參數(shù)資料
型號(hào)： PPC403GC-JA33C1
元件分類(lèi)： 32位微控制器
英文描述： 32-Bit Microprocessor
中文描述： 32位微處理器
文件頁(yè)數(shù)： 39/48頁(yè)
文件大?。?/td> 768K
代理商： PPC403GC-JA33C1
IBM PowerPC 403GC
39
DRAM 3-2-2-2 Page Mode Write
Bank Register Bit Settings
Notes:
1. For burst access, the addresses represented by Columns 1 to 4 do not necessarily indicate that they are in
incremental address order. Typically, burst access is target word first.
2. If internal mux mode is used, address bits A11:29 represent address bits described in Table 20 on page 32.
3. During internal mux mode access, A6:10 retain their unmultiplexed values.
4. If external mux mode is used, A11:29 are unaffected and do not change between CAS and RAS cycles.
5. If bus width is programmed as byte or half-word, WBE2:3 represent address bits A30:31 regardless of mux mode.
6. WBE0:1 are always ones during DRAM transfers.
SLF
ERM
Bus
Width
Ext
Mux
RAS-to-
CAS
Refresh
Mode
Page
Mode
First
Access
Burst
Access
Prechg
Cycles
Refresh
RAS
Refresh
Rate
Bit 13 Bit 14
Bits
15:16
Bit 17
Bit 18
Bit 19
Bit 20
Bits
21:22
Bits
23:24
Bit 25
Bit 26
Bits
27:30
0 or 1
0
xx
x
0
0
1
01
01
0
x
xxxx
SysClk
A11:29
R/W
RAS
CAS0:3
DRAMOE
DRAMWE
D0:31
1
2
3
4
5
6
7
8
9
10
11
12
AMuxCAS
Row
Column1
Column2
Column3
Column4
RAS
CAS
CAS
CAS
CAS
Pre-
Charge
CAS
CAS
CAS
CAS
Data1
Data2
Data3
Data4
BusError
Error
Error
Error
Error
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PPC403GC-JA40C1 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:32-Bit Microprocessor
PPC403GCX3JC66C2 制造商:IBM 功能描述:*
PPC403GCX-JA50C2 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:32-Bit Microprocessor
PPC403GCX-JA60C2 制造商:IBM 功能描述:403GCX-JA60C2
PPC403GCX-JA66C2 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:32-Bit Microprocessor
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