參數(shù)資料
型號： PMS430E337
英文描述： 16-Bit Ultra-Low-Power Microcontroller. 32kB EPROM. 1KB RAM. USART. HW multiplier. 120 segment LCD
中文描述： 16位超低功耗微控制器。具有32kB存儲器。 1kB的內(nèi)存。的USART。硬件乘法器。 120段LCD
文件頁數(shù)： 9/29頁
文件大?。?/td> 411K
代理商： PMS430E337
MSP430x11x
MIXED SIGNAL MICROCONTROLLERS
SLAS196C
–
DECEMBER 1998
–
REVISED MARCH 2003
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
peripherals
Peripherals are connected to the CPU through data, address, and control busses and can be handled using
all instructions.
oscillator and system clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal digitally-controlled oscillator (DCO) and a high frequency crystal oscillator. The basic clock
module is designed to meet the requirements of both low system cost and low-power consumption. The internal
DCO provides a fast turn-on clock source and stabilizes in less than 6
μ
s. The basic clock module provides the
following clock signals:
Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal.
Main clock (MCLK), the system clock used by the CPU.
Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
digital I/O
There are two 8-bit I/O ports implemented
—
ports P1 and P2 (only six P2 I/O signals are available on external
pins):
All individual I/O bits are independently programmable.
Any combination of input, output, and interrupt conditions is possible.
Edge-selectable interrupt input capability for all the eight bits of port P1 and six bits of port P2.
Read/write access to port-control registers is supported by all instructions.
NOTE:
Six bits of Port P2, P2.0 to P2.5, are available on external pins
–
but all control and data bits for Port
P2 are implemented.
watchdog timer
The primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
timer_A3
Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
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