參數(shù)資料
型號: PM6685TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, QCC32
封裝: 5 X 5 MM, 1 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, VFQFPN-32
文件頁數(shù): 50/52頁
文件大?。?/td> 2536K
代理商: PM6685TR
PM6685
Pin settings
7/52
Pin
Name
Description
17
V5SW
Internal 5V regulator bypass connection.
– If V5SW is connected to OUT5 (or to an external 5V supply) and V5SW is
greater than 4.9V, the LDO5 regulator shuts down and the LDO5 pin is directly
connected to OUT5 through a 3W (max) switch.
– If V5SW is connected to GND, the LDO5 linear regulator is always on.
18
LDO5
5V internal regulator output. It can provide up to 100mA peak current. LDO5 pin
supplies embedded low side gate drivers and an external load.
19
VIN
Device input supply voltage. A bypass filter (4W and 4.7mF) between the battery
and this pin is recommended.
20
CSENSE5
Current sense input for the 5V section. This pin must be connected through a
resistor to the drain of the synchronous rectifier (RDSON sensing) to set the
current limit threshold.
21
PHASE5
Switch node connection and return path for the high side driver for the 5V
section.
22
HGATE5
High-side gate driver output for the 5V section.
23
BOOT5
Bootstrap capacitor connection for the 5V section. It supplies the high-side gate
driver.
24
SKIP
Pulse skip mode control input.
– If the pin is connected to LDO5 the PWM mode is enabled.
– If the pin is connected to GND, the pulse skip mode is enabled.
– If the pin is connected to VREF the pulse skip mode is enabled but the
switching frequency is kept higher than 33kHz (No-audible pulse skip mode).
25
EN5
5V SMPS enable input.
– The 5V section is enabled applying a voltage greater than 2.4V to this pin.
– The 5V section is disabled applying a voltage lower than 0.8V.
When the section is disabled the High Side gate driver goes low and Low Side
gate driver goes high.
26
PGOOD5
Power Good signal for the 5V section. This pin is an open drain output.
The pin is pulled low if the output is disabled or if it is out of approximately +/-
10% of its nominal value.
27
PGOOD3
Power Good signal for the 3.3V section. This pin is an open drain output.
The pin is pulled low if the output is disabled or if it is out of approximately +/-
10% of its nominal value.
28
LDO3SEL
Control pin for the 3.3V internal linear regulator. This pin determines three
operative modes for the LDO3.
– If LDO3_SEL pin is connected to GND the LDO3 output is always disabled.
– If LDO3_SEL pin is connected to LDO5 the LDO3 internal regulator is always
enabled.
– If LDO3_SEL pin is connected to VREF and OUT3 is greater than about 3V,
the LDO3 regulator shuts down and the LDO3 pin is be directly connected to
OUT3 through a 3W (max) switch.
29
OUT5
Output voltage sense for the 5V switching section.This pin must be directly
connected to the output voltage of the switching section.
30
COMP5
DC voltage error compensation pin for the 5V switching section..
31
VCC
Device Supply Voltage pin. It supplies the all the internal analog circuitry except
the gate drivers (see LDO5). Connect this pin to LDO5.
Table 2.
Pin functions (continued)
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