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參數(shù)資料
| 型號： | PM6680A |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.4 A DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, VFQFPN-32 |
| 文件頁數(shù)： | 46/48頁 |
| 文件大?。?/td> | 1932K |
| 代理商： | PM6680A |
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PM6680A
Pin settings
7/48
17
V5SW
Internal 5 V regulator bypass connection.
If V5SW is connected to OUT5 (or to an external 5 V supply) and V5SW is greater
than 4.9 V, the LDO5 regulator shuts down and the LDO5 pin is directly connected to
OUT5 through a 3
(max) switch.
If V5SW is connected to GND, the LDO5 linear regulator is always on.
18
LDO5
5V internal regulator output. It can provide up to 100 mA peak current. LDO5 pin
supplies embedded low side gate drivers and an external load.
19
VIN
Device supply voltage input and battery voltage sense. A bypass filter
(4
and 4.7 F) between the battery and this pin is recommended.
20 CSENSE1
Positive current sense input for the switching section 1. This pin must be connected
through a resistor to the drain of the synchronous rectifier (RDSON sensing) to obtain
a positive current limit threshold for the power supply controller.
21
PHASE1
Switch node connection and return path for the high side driver for the section 1.It is
also used as negative current sense input.
22
HGATE1
High-side gate driver ouput for section 1. This is the floating gate driver output.
23
BOOT1
Bootstrap capacitor connection for the switching section 1. It supplies the high-side
gate driver.
24
SKIP
Pulse skipping mode control input.
If the pin is connected to LDO5 the PWM mode is enabled.
If the pin is connected to GND, the pulse skip mode is enabled.
If the pin is connected to VREF the pulse skip mode is enabled but the switching
frequency is kept higher than 33 kHz (No-audible puse skip mode).
25
EN1
Enable input for the switching section 1.
The section 1 is enabled applying a voltage greater than 2.4 V to this pin.
The section 1 is disabled applying a voltage lower than 0.8 V.
When the section is disabled the High Side gate driver goes low and Low Side gate
driver goes high.
26 PGOOD1
Power Good ouput signal for the section 1. This pin is an open drain ouput and when
the ouput of the switching section 1 is out of +/- 10 % of its nominal value.It is pulled
down.
27 PGOOD2
Power Good ouput signal for the section 2. This pin is an open drain ouput and when
the ouput of the switching section 2 is out of +/- 10 % of its nominal value.It is pulled
down.
28
FB1
Feedback input for the switching section 1. This pin is connected to a resistive
voltage-divider from OUT1 to PGND to adjust the output voltage from 0.9 V to 5.5 V.
29
OUT1
Output voltage sense for the switching section 1.This pin must be directly connected
to the output votage of the switching section.
30
COMP1
DC voltage error compensation pin for the switching section 1.
31
VCC
Device supply voltage pin. It supplies all the internal analog circuitry except the gate
drivers (see LDO5). Connect this pin to LDO5.
32
VREF
Internal 1.237 V high accuracy voltage reference. It can deliver 50
A. Bypass to
SGND with a 100 nF capacitor to reduce noise.
Table 2.
Pin functions (continued)
N°
Pin
Function
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