參數(shù)資料
型號(hào): PM6675ASTR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: 3 A SWITCHING CONTROLLER, QCC24
封裝: 4 X 4 MM, LEAD FREE, VFQFPN-24
文件頁(yè)數(shù): 13/48頁(yè)
文件大?。?/td> 2481K
代理商: PM6675ASTR
Device description
PM6675AS
20/48
Figure 25.
Circuitry for output ripple compensation
The additional capacitor is used to reduce the voltage on the COMP pin when higher than
300 mVpp and is unnecessary for most of applications. The transconductance amplifier
(gm) generates a current, proportional to the DC error, used to charge the CINT capacitor.
The voltage across the CINT capacitor feeds the negative input of the PWM comparator,
forcing the loop to compensate the total static error. An internal voltage clamp forces the
COMP pin voltage range to ±150 mV respect to VREF. This is useful to avoid or smooth
output voltage overshoot during a load transient. When the Pulse-Skip Mode is entered, the
clamping range is automatically reduced to 60 mV in order to enhance the recovering
capability. In case the ripple amplitude is larger than 150 mV, an additional capacitor CFILT
can be connected between the COMP pin and ground to reduce ripple amplitude, otherwise
the integrator will operate out of its linearity range. This capacitor is unnecessary for most of
applications and can be omitted.
The design of the external feedback network depends on the output voltage ripple. If the
ripple is higher than approximately 20 mV, the correct CINT capacitor is usually enough to
keep the loop stable. The stability of the system depends firstly on the output capacitor zero
frequency.
The following condition must be satisfied:
Equation 6
+
-
V
VR
RE
EF
F
C
CO
OM
MP
P
g
gm
m
V
VS
SN
NS
S
R
RFFbb11
R
RFFbb22
V
Vrr
+
P
PW
WM
M
C
Co
om
mp
pa
arra
atto
orr
C
CIINNTT
R
RIINNTT
C
CFFIILLTT
t
Vr
C
COOUUTT
COMP PIN
VOLTAGE
OUTPUT
VOLTAGE
I=gm(V1-Vr)
V
V11
t
V
V
VCCIINNTT
E
ES
SR
R
ESR
C
2
k
f
k
f
out
Zout
SW
×
π
=
×
>
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