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參數(shù)資料
| 型號： | PM6641TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, 1100 kHz SWITCHING FREQ-MAX, QCC48 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, LEAD FREE, VQFP-48 |
| 文件頁數(shù)： | 19/47頁 |
| 文件大?。?/td> | 2254K |
| 代理商： | PM6641TR |
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Device description
PM6641
26/47
Doc ID 13510 Rev 3
7.4
SW regulators pulse skipping and PWM mode
In order to enhance the light load efficiency each switching regulator enters the pulse
skipping algorithm when the output current sourced is too low. The threshold load current
which allows the regulator to enter the pulse skipping mode can be estimated with the
following formula: (Vi-Vo)/(2Lfsw)*Vo/Vi
Equation 4
When the load current is lower than IOmin value, the switching regulator begins to skip some
cycle, decreasing the effective switching frequency and, as a consequence, reducing the
switching losses. This mode of operation is guaranteed by the presence of the zero crossing
current comparator, the internal block which senses the inductor current and avoids this
current to becoming negative, in the normal operating condition.
The inductor current is allowed to become negative when the output voltage rises above the
+10% power good threshold. In this condition of output soft over voltage the zero crossing
current comparator is deactivated and the pulse skipping algorithm is replaced by the typical
PWM one; as a consequence each switching regulator can sink up to some hundreds milli
amps to decrease the output voltage to the nominal value.
Figure 29.
SW regulators pulse skipping and PWM mode
Iomin
V
I
V
O
–
()
2Lf
SW
()
------------------------
≈
V
O
V
I
-------
a) Pulse Skipping Mode
b) PWM Mode
Vout
I
L
Vout
I
L
Clock
a) Pulse Skipping Mode
b) PWM Mode
Vout
I
L
Vout
I
L
Clock
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