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參數(shù)資料
| 型號(hào)： | PM5945-UTP5 |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | ATM PHYSICAL INTERFACE APPLICATION BOARD FOR CAT-5 UTP |
| 中文描述： | ATM物理接口貓應(yīng)用板- 5雙絞線 |
| 文件頁(yè)數(shù)： | 64/84頁(yè) |
| 文件大?。?/td> | 1666K |
| 代理商： | PM5945-UTP5 |
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S
TANDARD
P
RODUCT
PMC-Sierra, Inc.
PM5945 -UTP5
PMC-940202 ISSUE 2. APRIL 7, 1995
______________________________________________________________________________________________
APP_SAPI_UTP5
______________________________________________________________________________________________
55
t (mil)
1.4
1.4
1.4
1.4
Zo (Ohm)
50
50
100
100
W (mil)
108.9
101.6
24.7
21.3
The value of the parameter h1 is chosen to be 62 mil. Since h1 is directly
proportional to the width of the traces, a small h1 will result in the 100 Ohm traces
being too thin to be accurately fabricated. Wider traces can be more precisely
manufactured, but they take up too much board space. Therefore, the thickness of
the board should be chosen so that the traces take up as little board space as
possible yet still leaving enough margin to allow accurate fabrication. In the layout
enclosed, the width of the 100 Ohm traces is 24 mil and that of the 50 Ohm traces is
104 mil.
Routing
Routing is based on the design considerations as well as manufacturability. Several
suggestions are listed below:
Turns and corners should be rounded to curves to avoid discontinuity in the
signal path.
Allow at least 10 mil clearance among vias, traces, and pads to prevent short and
reduce crosstalk. If possible, allow 20 mil or more clearance around vias as
manufacturers may have minimum clearance requirements. For the traces that
runs between pads of the 100 pin edge connector, clearance of 6 mil and trace
width of 8 mil can be used. However, the number and lengths such traces
should be kept to a minimum.
The differential signal pairs should be of equal length so that both signals arrive
at the inputs at the same time. They should also run parallel and close to one
another for as long as possible so that noise will couple onto both lines and
become common mode noise which is ignored by the differential inputs. Even
though single ended inputs should not run parallel to one another in close
proximity, since all of the single ended signals that run parallel to one another on
the UTOPIA interface side are low speed signals and are sampled after they
have all settled down, they should not cause any concern.
All power and ground traces should be made as wide as possible, up to 24 mil to
provide low impedance paths for the supply current as well as to allow quick
noise dissipation.
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