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參數(shù)資料
| 型號： | PM5357 |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 622 Mbit/s ATM and Packet Over SONET Physical Layer Device |
| 中文描述： | ATM NETWORK INTERFACE, PBGA304 |
| 封裝： | SBGA-304 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 64K |
| 代理商： | PM5357 |
PMC-981280 (R2)
1999 PMC-Sierra, Inc. January, 1999
PM5357
PMC-Sierra,Inc.
622 Mbit/s ATM and Packet Over SONET Physical Layer Device
S/UNI-622-POS
FEATURES
GENERAL
ATM and Packet over SONET/SDH
(POS) OC-12c (622 Mbit/s) PHY
Provides on-chip clock and data
recovery and clock synthesis
Exceeds Bellcore-GR-253 jitter
requirements
Inserts and extracts ATM cells or POS
packets into/from SONET SPE
Filters and captures Automatic
Protection Switch bytes (K1,K2) and
detects APS byte failure
Detects signal degrade and signal
failure thresholds crossing alarms
Captures and debounces
synchronization status byte (S1)
Extracts and Inserts the 16 or 64-byte
section trace (J0) and path trace (J1)
messages
Extracts and inserts section/line data
communication channels (DCC)
Provides circuitry to meet holdover,
wander and long term stability
Provides a generic 8-bit
microprocessor interface for device
control and register access
Provides standard IEEE 1149.1 JTAG
test port for boundary scan
ATM
Implements the ATM Forum User
Network Interface Specification
Performs cell payload scrambling and
descrambling
Provides a UTOPIA Level 2 and an 8-
bit 100MHz UTOPIA Level 3 compliant
system interface
Provides synchronous 4 cell transmit
and receive FIFO buffers
PACKET OVER SONET/SDH
Supports direct packet mapping into
SONET/SDH such as PPP, HDLC and
Frame Relay
Implements the PPP over SONET/
SDH specification according to RFC
1619 and 1662 of the IETF
Performs flag sequence detection and
insertion
Performs CRC-CCITT and CRC-32
FCS generation and validation
Performs byte stuffing and destuffing
Checks for minimum and maximum
packet lengths
Checks for packet abort sequence
Performs X
43
+1 payload scrambling
Provides a SATURN POS-PHY Level
2 and an 8-bit 100MHz POS-PHY
Level 3 system interface
Provides synchronous 256 byte
transmit and receive FIFO buffers
PACKAGING
Implemented in low power 3.3 Volt
CMOS technology
Packaged in a 304 SBGA
Industrial temperature range (-40°C to
+85°C)
APPLICATIONS
WAN and Edge ATM switches
Multiprotocol switches
Layer 3 switches
Routers, Packet switches and Hubs
BLOCK DIAGRAM
U
P
S
Tx
Line
I/F
Rx
Line
I/F
JTAG Test
Access Port
T
T
T
T
T
T
T
T
S
Tx Line O/H
Processor
Rx Line O/H
Processor
Path Trace
Buffer
Tx Section
O/H
Processor
Section
Trace Buffer
Tx Path O/H
Processor
Rx Path O/H
Processor
Tx POS
Frame
Processor
Rx POS
Frame
Processor
ATP[0]
TXD+/-
TDREF1,TDREF0
FPOUT
POUT[7:0]
PTCLK
L
R
R
R
Rx Section
O/H
Processor
FPIN
OOF
PIN[7:0]
PICLK
C1,C0
ATP[1]
SD
RRCLK+/-
RXD+/-
REFCLK+/-
PECLV
RBYP
Microprocessor
Interfaces
D
R
R
W
C
A
A
I
Rx APS, Sync
Status, BERM
A
Section/Line
DCC Extract
R
R
R
R
WAN
Synch.
Rx ATM Cell
Processor
Tx ATM Cell
Processor
Section/Line
DCC Insert
T
T
T
T
P
TFCLK
TENB
TCA/TPA
TSOC/TSOP
TPRTY
TDAT[15:0]
TMOD
TEOP
TERR
RFCLK
RENB
RCA/RPA
RSOC/RSOP
RPRTY
RDAT[15:0]
RMOD
RVAL
RERR
REOP
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PM5357-BI | SATURN USER NETWORK INTERFACE (622-MAX) |
| PM5358 | Quad Channel OC-12c ATM and POS Physical Layer Device |
| PM5361 | TRIBUTARY UNIT PAYLOAD PROCESSOR |
| PM5361-RI | TRIBUTARY UNIT PAYLOAD PROCESSOR |
| PM5361-EI | TRIBUTARY UNIT PAYLOAD PROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM5357BI | 制造商:PMC-Sierra 功能描述: |
| PM5357-BI | 制造商:PMC-Sierra 功能描述: |
| PM5357BIP | 制造商:PMC-Sierra 功能描述: |
| PM5358 | 制造商:PMC 制造商全稱:PMC 功能描述:Quad Channel OC-12c ATM and POS Physical Layer Device |
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