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參數(shù)資料
| 型號： | PM50RLA120 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FLAT-BASE TYPE INSULATED PACKAGE |
| 中文描述： | 平性基地型絕緣包裝 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大小： | 98K |
| 代理商： | PM50RLA120 |
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50RLA120
FLAT-BASE TYPE
INSULATED PACKAGE
Oct. 2003
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (V
D
), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing
“
SC
”
tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above V
CES
rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
10%
90%
trr
Irr
tr
td (on)
tc (on)
tc (off)
td (off)
V
CIN
Ic
V
CE
10%
10%
10%
90%
tf
(ton= td (on) + tr)
(toff= td (off) + tf)
Fo
Fo
P
N
N
C
S
C
S
U,V,W
Vcc
Vcc
Ic
Ic
V
D
(all)
V
D
(all)
P
U,V,W
V
CIN
V
CIN
V
CIN
(
15V
)
V
CIN
(
15V
)
Fo
Fo
Fig. 3 Switching time and SC test circuit
Fig. 4 Switching time test waveform
a) Lower Arm Switching
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
b) Upper Arm Switching
P, (U,V,W,B)
U,V,W, (N)
U,V,W,B, (N)
V
D
(all)
Fig. 1 V
CE(sat)
Test
IN
Fo
IN
Fo
V
D
(all)
Fig. 2 V
EC
, (V
FM
) Test
V
CIN
(0V)
Ic
V
V
P, (U,V,W)
V
CIN
(15V)
–
Ic
V
CIN
Fig. 7 Dead time measurement point example
Fig. 5 I
CES
Test
Fig. 6 SC test waveform
SC
Short Circuit Current
toff(SC)
V
D
(all)
U,V,W, (N)
P, (U,V,W,B)
A
Pulse
V
CE
V
CIN
(15V)
Ic
Fo
IN
Fo
0V
1.5V
1.5V
1.5V
t
dead
2V
2V
2V
0V
t
t
t
dead
t
dead
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
IPM
’
input signal V
CIN
(Upper Arm)
IPM
’
input signal V
CIN
(Lower Arm)
Constant Current
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