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參數(shù)資料
| 型號： | PM50CSE060 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | FLAT-BASE FLAT-BASE TYPE INSULATED PACKAGE |
| 中文描述： | 平基平基型絕緣包裝 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大小： | 131K |
| 代理商： | PM50CSE060 |
MITSUBISHI <INTELLIGENT POWER MODULES>
PM50CSE060
FLAT-BASE TYPE
INSULATED PACKAGE
Sep. 2001
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (V
D
), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing
“
OC
”
and
“
SC
”
tests, the turn-off surge voltage spike at the corresponding protection operation should not
be allowed to rise above V
CES
rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
10%
90%
trr
Irr
tr
td (on)
tc (on)
tc (off)
td (off)
V
CIN
Ic
V
CE
10%
10%
10%
90%
tf
(ton= td (on) + tr)
(toff= td (off) + tf)
V
D
(all)
U,V,W, (N)
P, (U,V,W)
A
Pulse
V
CE
V
CIN
(15V)
V
D
(all)
U,V,W, (N)
P, (U,V,W)
V
CIN
V
CC
I
C
I
C
I
C
OC
SC
V
CIN
t
off (OC)
U,V,W
N
V
CINN
V
CINP
V
D
V
D
P
Ic
Vcc
V
CINN
0V
0V
V
CINP
t
t
t
dead
t
dead
t
dead
P, (U,V,W)
U,V,W, (N)
U,V,W, (N)
V
D
(all)
Fig. 1 V
CE(sat)
Test
IN
(Fo)
Fo
IN
(Fo)
V
D
(all)
Fig. 2 V
EC
Test
V
CIN
(0V)
Ic
V
V
P, (U,V,W)
V
CIN
(15V)
–
Ic
P
N
N
C
S
C
S
U,V,W
Vcc
Vcc
Ic
Ic
V
D
(all)
V
D
(all)
Fig. 3 Switching time Test circuit and waveform
P
U,V,W
V
CIN
V
CIN
V
CIN
(
15V
)
V
CIN
(
15V
)
Fo
IN
(Fo)
IN
(Fo)
Short Circuit Current
Over Current
Constant Current
Constant Current
Fig. 7 Dead time measurement point example
a) Lower Arm Switching
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
b) Upper Arm Switching
Fig. 4 I
CES
Test
Fig. 5 OC and SC Test
Fig. 6 OC and SC Test waveform
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