參數(shù)資料
型號(hào)： PLRXPL-VE-SG4-62-N
廠商： JDS UNIPHASE CORP
元件分類(lèi)： 光收發(fā)
英文描述： FIBER OPTIC TRANSCEIVER, 840-860nm, 2125Mbps(Tx), 2125Mbps(Rx), LC CONNECTOR
封裝： ROHS COMPLIANT PACKAGE
文件頁(yè)數(shù)： 8/22頁(yè)
文件大小： 1600K
代理商： PLRXPL-VE-SG4-62-N
16
ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS
Vcc/Supply Voltage in Volts: Internally measured. Represented as a 16 bit un-
signed integer with the voltage dened as the full 16 bit value(0-65535) with LSB
equal to 100
μV with a measurement range of 0 to +6.55V. Accuracy is ± 3% of
nominal value over the specied operating temperature and voltage ranges.
TX Bias Current in
μA: Represented as a 16 bit unsigned integer with current
dened as the full 16 bit value(0-65535) with LSB equal to 2
μA with a measure-
ment range of 0 - 131
μA. Accuracy is ± 10% of nominal value over the specied
operating temperature and voltage ranges.
TX Output Power in mW: Represented as a 16 bit unsigned integer with the power
dened as the full 16 bit value (0-65535) with LSB equal to 0.1
μW. Accuracy is ±
2dB over the specied temperature and voltage ranges over the range of 100
μW to
800
μW( -10dBm to -1dBm). Data is not valid when transmitter is disabled.
RX Received Optical Power in mW: Represented as average power as a 16 bit un-
signed integer with the power dened as the full 16 bit value(0-65535) with LSB
equal to 0.1
μW. Accuracy is ± 3dB over the specied temperature and voltage
ranges over the power range of 30
μW to 1000μW (-15dBm to 0dBm).
Reading the data
The information is accessed through the MOD_DEF(1), and MOD_DEF(2) con-
nector pins of the module. The specication for this EEPROM (ATMEL AT-
24CO1A family) contains all the timing and addressing information required for
accessing the data.
The device address used to read the Serial ID data is 1010000X(A0h), and the ad-
dress to read the diagnostic data is 1010001X(A2h). Any other device addresses
will be ignored. Refer to Table 4, Table 5, and Table 6 for information regarding
addresses and data eld descriptions
MOD_DEF(0), pin 6 on the transceiver, is connected to Logic 0 (Ground) on the
transceiver.
MOD_DEF(1), pin 5 on the transceiver, is connected to the SCL pin of the EEPROM.
MOD_DEF(2), pin 4 on the transceiver, is connected to the SDA pin of the EEPROM.
The EEPROM WP pin is internally tied to ground with no external access, allowing
write access to the customer-writable eld(bytes 128-247 of address 1010001X).
Note: address bytes 0-127 are not write protected and may cause diagnostic mal-
functions if written over.
Decoding the data
The information stored in the EEPROM including organization is dened in the
Small Form-Factor document SFF-8472 draft rev 9.5, dated June 1, 2004.
相關(guān)PDF資料
PDF描述
PLRXXL-SC-S43-C1 FIBER OPTIC TRANSCEIVER, 840-860nm, 10312.5Mbps(Tx), 10312.5Mbps(Rx), PANEL MOUNT, LC CONNECTOR
PLS-2 Broadband, 100 to 900 MHz
PLS13W3F0000 13 CONTACT(S), FEMALE, POWER CONNECTOR
PLS13W3M0000 13 CONTACT(S), MALE, POWER CONNECTOR
PLS7W3F0000 7 CONTACT(S), FEMALE, POWER CONNECTOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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