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參數(shù)資料
| 型號： | PL-RCP-02-S53-11 |
| 廠商： | JDS UNIPHASE CORP |
| 元件分類： | 光接收 |
| 英文描述： | FIBER OPTIC RECEIVER, 830-860nm, 2700Mbps |
| 文件頁數(shù)： | 22/24頁 |
| 文件大小： | 495K |
| 代理商： | PL-RCP-02-S53-11 |
7
12 X 2.7 GBPS PARALLEL OPTICAL TRANSMITTER/RECEIVER
Notes:
Power supply ltering components should be placed on the opposite side of the
PCB directly under the PL-xCP-02-S53-11 transmitter/receiver, as close to the Vcc
pins as possible for optimal performance.
PECL, LVDS, or other outputs may require biasing networks, not shown. Consult
Application Information for those devices.
Transmission lines should be 100 ohm differential traces. It is recommended that
the termination resistor be placed beyond the Rx IC pins.
For unused channels, receiver output pairs should be terminated to Vpp or AC
terminated to ground. Unused transmitter inputs should be tied together, or DC
biased to the zero state (preferred).
If using dc coupling, users must ensure data remains dc balanced, or maintain a
steady zero level at the TX input, otherwise rated optical output power may be
exceeded.
Series resistors can be used to improve electrical crosstalk on a system board and to
improve impedance match at the source.
Figure 8
Tx module; high speed input; LVDS or similar interface
100
Differential
PL-RCP-01-Sxx-xx
Rx output
Serializer
CML Input
CML
Output
Vcc
50
VPU
Hook-up is optional in a DC-coupled Application.
A 0.1uf Capacitor is required on this pin.
Figure 9
Tx module; high speed input; PECL or similar interface
.
100
Differential
PL-TCP-01-Sxx-xx
TX input
Serializer LVDS
Output
LVDS
Output
10
0.1 F
VREF
50
.
100
Differential
PL-TCP-01-Sxx-xx
TX input
Serializer PECL
Output
PECL
Output
47
0.1 F
VREF
50
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