參數(shù)資料
型號: PKF5113SI
廠商: ERICSSON POWER MODULES AB
元件分類: 電源模塊
英文描述: 1-OUTPUT 11 W DC-DC REG PWR SUPPLY MODULE
封裝: 0.315 INCH HEIGHT, SMD-18
文件頁數(shù): 7/8頁
文件大?。?/td> 145K
代理商: PKF5113SI
7
EN/LZT 146 195 R1A Ericsson Power Modules AB, October 2002
Characteristics
min
typ
max
Unit
High level
2.2
6.5
V
Threshold level*)
1.2
1.7
2.2
V
Low level
0
0.4
V
Sink current
1.5
mA
Sync. frequency
520
688
kHz
Version
Part No.
Surface mount
PKF 5113 SI
Output Voltage Adjust (Vadj)
Output voltage, VO, can be adjusted by using an external
resistor or other external circuitry. If other circuitry is used,
the slew rate has to be limited to maximum 5 V/ms. If pins
8 and 9 are not connected together the output will decrease
to approximately 6.7 V. To increase VO a resistor should
be connected between pin 8/9 and 17, and to decrease VO a
resistor should be connected between pin 8 and 9 (see g. 3).
To increase output voltage:
Rounom=4.20×(15-VO)/(VO-Vi) k
To decrease output voltage:
Rodnom=18×(Vi-VO)/(VO-6.7) k
Vi is the initial output voltage when pin 8 and 9 are connected,
VO is the desired output voltage.
Figure 3
Current Limiting Protection (Ilim)
The output power is limited at loads above the output current
limiting threshold (Ilim), specied as a minimum value.
Capacitive Load
The PKF series has no maximum limit for capacitive load
on the output. The power module may operate in current
limiting mode during start-up, affecting the ramp-up and the
start-up time. For optimum start performance we recommend
maximum 100 F/A of IO. Connect capacitors at the point of
load for best performance.
Input and Output Impedance
Both the source impedance of the power feeding and the load
impedance will interact with the impedance of the DC/DC
power module.
Due to the low energy storage capability of the power module,
it is very important to maintain a low characteristic impedance
at the input and output of the module i.e. a low ratio between
L and C.
Use an electrolytic capacitor across the input if the source
inductance is higher than 10 H. Their equivalent series
resistance together with the capacitance acts as a lossless
damping lter. Suitable capacitor values are in the range 10–
100 F.
Synchronization (Sync)
It is possible to synchronize the switching frequency to an external
symmetrical clock signal. The input can be driven by an TTL-
compatible output and referenced to the input pin 17.
Parallel Operation
Paralleling of several converters is easily accomplished by
direct connection of the output voltage terminal pins. The load
regulation characteristic is specically designed for optimum
paralleling performance. Load sharing between converters will
be within ±10%. It is recommended not to exceed PO = n ×
0.9 × POmax, where POmax is the maximum converter output
power and n the number of paralleled converters, to prevent
overloading any of the converters and thereby decreasing the
reliability performance.
Ordering Information
*)
Rise time <10ns
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