- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3862 > PIC24FJ48GA004-I/ML (Microchip Technology)IC PIC MCU FLASH 48K 44-QFN PDF資料下載
參數(shù)資料
| 型號： | PIC24FJ48GA004-I/ML |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 8/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PIC MCU FLASH 48K 44-QFN |
| 產(chǎn)品培訓模塊： | Graphics LCD System and PIC24 Interface Asynchronous Stimulus |
| 特色產(chǎn)品： | PIC24FJ/33FJ MCUs & dsPIC? DSCs |
| 標準包裝： | 45 |
| 系列： | PIC® 24F |
| 核心處理器： | PIC |
| 芯體尺寸： | 16-位 |
| 速度： | 32MHz |
| 連通性： | I²C，PMP，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復位，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 35 |
| 程序存儲器容量： | 48KB（16K x 24） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 13x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-VQFN 裸露焊盤 |
| 包裝： | 管件 |
| 配用： | 876-1004-ND - PIC24 BREAKOUT BOARD DM240011-ND - KIT STARTER MPLAB FOR PIC24F MCU AC162088-ND - HEADER MPLAB ICD2 24FJ64GA004 28 AC164336-ND - MODULE SOCKET FOR PM3 28/44QFN DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
PIC24FJXXXGA0XX
DS39768D-page 16
2008 Microchip Technology Inc.
3.4
Flash Memory Programming in
ICSP Mode
3.4.1
PROGRAMMING OPERATIONS
Flash memory write and erase operations are controlled
by the NVMCON register. Programming is performed by
setting NVMCON to select the type of erase operation
(Table 3-2) or write operation (Table 3-3) and initiating
the programming by setting the WR control bit
(NVMCON<15>).
In ICSP mode, all programming operations are
self-timed. There is an internal delay between the user
setting the WR control bit and the automatic clearing of
the WR control bit when the programming operation
is complete. Please refer to Section 7.0 “AC/DC
information about the delays associated with various
programming operations.
TABLE 3-2:
NVMCON ERASE
OPERATIONS
TABLE 3-3:
NVMCON WRITE
OPERATIONS
3.4.2
STARTING AND STOPPING A
PROGRAMMING CYCLE
The WR bit (NVMCON<15>) is used to start an erase or
write cycle. Setting the WR bit initiates the programming
cycle.
All erase and write cycles are self-timed. The WR bit
should be polled to determine if the erase or write cycle
has been completed. Starting a programming cycle is
performed as follows:
3.5
Erasing Program Memory
The procedure for erasing program memory (all of code
memory,
data
memory,
executive
memory
and
code-protect bits) consists of setting NVMCON to
404Fh and executing the programming cycle.
A Chip Erase can erase all of user memory or all of both
the user and configuration memory. A table write
instruction should be executed prior to performing the
Chip Erase to select which sections are erased.
When this table write instruction is executed:
If the TBLPAG register points to user space (is
less than 0x80), the Chip Erase will erase only
user memory.
If TBLPAG points to configuration space (is
greater than or equal to 0x80), the Chip Erase will
erase both user and configuration memory.
If configuration memory is erased, the internal
oscillator Calibration Word, located at 0x807FE,
will be erased. This location should be stored prior
to performing a whole Chip Erase and restored
afterward to prevent internal oscillators from
becoming uncalibrated.
Figure 3-5 shows the ICSP programming process for
performing a Chip Erase. This process includes the
ICSP command code, which must be transmitted (for
each instruction), Least Significant bit first, using the
PGCx and PGDx pins (see Figure 3-2).
FIGURE 3-5:
CHIP ERASE FLOW
NVMCON
Value
Erase Operation
404Fh
Erase all code memory, executive
memory and Configuration registers
(does not erase Unit ID or Device ID
registers).
4042h
Erase a page of code memory or
executive memory.
NVMCON
Value
Write Operation
4003h
Write a Configuration Word register.
4001h
Program 1 row (64 instruction words) of
code memory or executive memory.
BSET
NVMCON, #WR
Note:
Program memory must be erased before
writing any data to program memory.
Start
Done
Set the WR bit to Initiate Erase
Write 404Fh to NVMCON SFR
Delay P11 + P10 Time
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PIC18F26J13-I/SO | IC PIC MCU 64KB FLASH 28SOIC |
| PIC32MX130F064B-I/SS | IC MCU 32BIT 64KB FLASH 28-SSOP |
| DSPIC30F2011-20I/SO | IC DSPIC MCU/DSP 12K 18SOIC |
| DSPIC30F2011-30I/SO | IC DSPIC MCU/DSP 12K 18SOIC |
| PIC16LF87-I/P | IC MCU FLASH 4KX14 EEPROM 18DIP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC24FJ48GA004T-I/ML | 功能描述:16位微控制器 - MCU 48KB Flash 8192bytes RAM 35 I/O RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| PIC24FJ48GA004T-I/PT | 功能描述:16位微控制器 - MCU 48KB Flash 8192bytes RAM 35 I/O RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| PIC24FJ64GA | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:28/44-Pin General Purpose, 16-Bit Flash Microcontrollers |
| PIC24FJ64GA002 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:PIC24FJ64GA004 Family Silicon Errata and Data Sheet Clarification |
| PIC24FJ64GA002-E/ML | 功能描述:16位微控制器 - MCU 16B 64KB Flash I/O 16 MIPS nanoWatt RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。