2006 Microchip Technology Inc.
Advance Information
DS39762A-page 457
PIC18F97J60 FAMILY
INDEX
A
A/D ...................................................................................325
A/D Converter Interrupt, Configuring .......................329
Acquisition Requirements ........................................330
ADCAL Bit ................................................................333
ADCON0 Register ....................................................325
ADCON1 Register ....................................................325
ADCON2 Register ....................................................325
ADRESH Register ............................................325, 328
ADRESL Register ....................................................325
Analog Port Pins, Configuring ..................................331
Associated Registers ...............................................333
Automatic Acquisition Time ......................................331
Calibration ................................................................333
Configuring the Module ............................................329
Conversion Clock (T
AD
) ...........................................331
Conversion Requirements .......................................447
Conversion Status (GO/DONE Bit) ..........................328
Conversions .............................................................332
Converter Characteristics ........................................446
Operation in Power-Managed Modes ......................333
Special Event Trigger (ECCP) .........................192, 332
Use of the ECCP2 Trigger .......................................332
Absolute Maximum Ratings .............................................413
AC (Timing) Characteristics .............................................427
Load Conditions for Device Timing
Specifications ...................................................428
Parameter Symbology .............................................427
Temperature and Voltage Specifications .................428
Timing Conditions ....................................................428
Access Bank
Mapping with Indexed Literal Offset Mode .................93
ACKSTAT ........................................................................290
ACKSTAT Status Flag .....................................................290
ADCAL Bit ........................................................................333
ADCON0 Register ............................................................325
GO/DONE Bit ...........................................................328
ADCON1 Register ............................................................325
ADCON2 Register ............................................................325
ADDFSR ..........................................................................402
ADDLW ............................................................................365
ADDULNK ........................................................................402
ADDWF ............................................................................365
ADDWFC .........................................................................366
ADRESH Register ............................................................325
ADRESL Register ....................................................325, 328
Affected Instructions ..........................................................91
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................366
ANDWF ............................................................................367
Assembler
MPASM Assembler ..................................................410
Auto-Wake-up on Sync Break Character .........................316
B
Baud Rate Generator .......................................................286
BC ....................................................................................367
BCF ..................................................................................368
BF ....................................................................................290
BF Status Flag .................................................................290
Block Diagrams
16-Bit Byte Select Mode .......................................... 111
16-Bit Byte Write Mode ............................................ 109
16-Bit Word Write Mode .......................................... 110
8-Bit Multiplexed Mode ............................................ 113
A/D ........................................................................... 328
Analog Input Model .................................................. 329
Baud Rate Generator .............................................. 286
Capture Mode Operation ......................................... 183
Comparator Analog Input Model .............................. 339
Comparator I/O Operating Modes ........................... 336
Comparator Output .................................................. 338
Comparator Voltage Reference ............................... 342
Comparator Voltage Reference Output
Buffer Example ................................................ 343
Compare Mode Operation ....................................... 184
Connections for On-Chip Voltage Regulator ........... 354
Device Clock .............................................................. 39
Enhanced PWM ....................................................... 193
Ethernet Interrupt Logic ........................................... 225
Ethernet Module ...................................................... 205
EUSART Receive .................................................... 315
EUSART Transmit ................................................... 312
External Power-on Reset Circuit
(Slow V
DD
Power-up) ........................................ 55
Fail-Safe Clock Monitor ........................................... 356
Generic I/O Port Operation ...................................... 135
Interrupt Logic .......................................................... 120
MSSP (I
2
C Master Mode) ........................................ 284
MSSP (I
2
C Mode) .................................................... 265
MSSP (SPI Mode) ................................................... 255
On-Chip Reset Circuit ................................................ 53
PIC18F66J60/66J65/67J60 ....................................... 11
PIC18F86J60/86J65/87J60 ....................................... 12
PIC18F96J60/96J65/97J60 ....................................... 13
PORTD and PORTE (Parallel Slave Port) ............... 160
PWM Operation (Simplified) .................................... 186
Reads from Flash Program Memory ......................... 99
Required External Components for Ethernet ........... 207
Single Comparator ................................................... 337
Table Read Operation ............................................... 95
Table Write Operation ............................................... 96
Table Writes to Flash Program Memory .................. 101
Timer0 in 16-Bit Mode ............................................. 164
Timer0 in 8-Bit Mode ............................................... 164
Timer1 ..................................................................... 168
Timer1 (16-Bit Read/Write Mode) ............................ 168
Timer2 ..................................................................... 174
Timer3 ..................................................................... 176
Timer3 (16-Bit Read/Write Mode) ............................ 176
Timer4 ..................................................................... 180
Watchdog Timer ...................................................... 353
BN .................................................................................... 368
BNC ................................................................................. 369
BNN ................................................................................. 369
BNOV .............................................................................. 370
BNZ ................................................................................. 370
BOR. See Brown-out Reset.
BOV ................................................................................. 373
BRA ................................................................................. 371
Break Character (12-Bit) Transmit and Receive .............. 318
BRG. See Baud Rate Generator.