MOVSS [z
參數(shù)資料
型號(hào)： PIC18F87K90-I/PTRSL
廠商： Microchip Technology
文件頁(yè)數(shù)： 58/110頁(yè)
文件大?。?/td> 0K
描述： MCU PIC 128K FLASH XLP 80TQFP
產(chǎn)品培訓(xùn)模塊： 8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝： 119
系列： PIC® XLP™ 18F
核心處理器： PIC
芯體尺寸： 8-位
速度： 64MHz
連通性： I²C，LIN，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 69
程序存儲(chǔ)器容量： 128KB（64K x 16）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 24x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-TQFP
包裝： 托盤
PIC18F47J53 FAMILY
DS39964B-page 504
Preliminary
2010 Microchip Technology Inc.
MOVSS
Move Indexed to Indexed
Syntax:
MOVSS [zs], [zd]
Operands:
0
zs 127
0
zd 127
Operation:
((FSR2) + zs) ((FSR2) + zd)
Status Affected:
None
Encoding:
1st word (source)
2nd word (dest.)
1110
1111
1011
xxxx
1zzz
xzzz
zzzzs
zzzzd
Description
The contents of the source register are
moved to the destination register. The
addresses of the source and destination
registers are determined by adding the
7-bit literal offsets, ‘zs’ or ‘zd’,
respectively, to the value of FSR2. Both
registers can be located anywhere in
the 4096-byte data memory space
(000h to FFFh).
The MOVSS instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
If the resultant source address points to
an Indirect Addressing register, the
value returned will be 00h. If the
resultant destination address points to
an Indirect Addressing register, the
instruction will execute as a NOP.
Words:
2
Cycles:
2
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Determine
source addr
Determine
source addr
Read
source reg
Decode
Determine
dest addr
Determine
dest addr
Write
to dest reg
Example:
MOVSS [05h], [06h]
Before Instruction
FSR2
=
80h
Contents
of 85h
=
33h
Contents
of 86h
=
11h
After Instruction
FSR2
=
80h
Contents
of 85h
=
33h
Contents
of 86h
=
33h
PUSHL
Store Literal at FSR2, Decrement FSR2
Syntax:
PUSHL k
Operands:
0
k 255
Operation:
k
(FSR2),
FSR2 – 1 FSR2
Status Affected:
None
Encoding:
1111
1010
kkkk
Description:
The 8-bit literal ‘k’ is written to the data
memory address specified by FSR2.
FSR2 is decremented by 1 after the
operation.
This instruction allows users to push
values onto a software stack.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read ‘k’
Process
data
Write to
destination
Example:
PUSHL 08h
Before Instruction
FSR2H:FSR2L
=
01ECh
Memory (01ECh)
=
00h
After Instruction
FSR2H:FSR2L
=
01EBh
Memory (01ECh)
=
08h
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