參數(shù)資料
型號: PIC18F86J55T-I/PT
廠商: Microchip Technology
文件頁數(shù): 47/61頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 48KX16 80TQFP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 1,200
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: EBI/EMI,I²C,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 65
程序存儲器容量: 96KB(48K x 16)
程序存儲器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 帶卷 (TR)
配用: AC162087-ND - HEADER MPLAB ICD2 18F87J50 68/84
MA180021-ND - MODULE PLUG-IN 18F87J50 FS USB
AC164328-ND - MODULE SKT FOR 80TQFP
其它名稱: PIC18F86J55T-I/PTTR
Philips Semiconductors
Product data
P87LPC767
Low power, low price, low pin count (20 pin)
microcontroller with 4-kbyte OTP and 8-bit A/D converter
2002 Mar 25
48
BIT
SYMBOL
FUNCTION
UCFG2.7, 6
SB2, SB1
EPROM security bits. See table entitled, “EPROM Security Bits” for details.
UCFG2.5–0
Reserved for future use.
SU01186
SB1
SB2
0
1
2
3
4
5
6
7
UCFG2
Unprogrammed Value: FFh
Address: FD01h
Figure 39. EPROM System Configuration Byte 2 (UCFG2)
Security Bits
When neither of the security bits are programmed, the code in the EPROM can be verified. When only security bit 1 is programmed, all further
programming of the EPROM is disabled. At that point, only security bit 2 may still be programmed. When both security bits are programmed,
EPROM verify is also disabled.
Table 12. EPROM Security Bits
SB2
SB1
Protection Description
1
Both security bits unprogrammed. No program security features enabled. EPROM is programmable and verifiable.
1
0
Only security bit 1 programmed. Further EPROM programming is disabled. Security bit 2 may still be programmed.
0
1
Only security bit 2 programmed. This combination is not supported.
0
Both security bits programmed. All EPROM verification and programming are disabled.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNIT
Operating temperature under bias
–55 to +125
°C
Storage temperature range
–65 to +150
°C
Voltage on RST/VPP pin to VSS
0 to +11.0
V
Voltage on any other pin to VSS
–0.5 to VDD+0.5 V
V
Maximum IOL per I/O pin
20
mA
Power dissipation (based on package heat transfer, not device power consumption)
1.5
W
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section
of this specification are not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.
3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise noted.
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