參數(shù)資料
型號(hào): PIC18F85J50T-I/PT
廠商: Microchip Technology
文件頁(yè)數(shù): 8/61頁(yè)
文件大小: 0K
描述: IC PIC MCU FLASH 16KX16 80TQFP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 1,200
系列: PIC® 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: EBI/EMI,I²C,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 65
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 帶卷 (TR)
配用: AC162087-ND - HEADER MPLAB ICD2 18F87J50 68/84
MA180021-ND - MODULE PLUG-IN 18F87J50 FS USB
AC164328-ND - MODULE SKT FOR 80TQFP
其它名稱: PIC18F85J50T-I/PTTR
PIC18F87J50 FAMILY
DS39775C-page 16
2009 Microchip Technology Inc.
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/FLT0/INT0
RB0
FLT0
INT0
48
I/O
I
TTL
ST
Digital I/O.
ECCP1/2/3 Fault input.
External interrupt 0.
RB1/INT1/PMA4
RB1
INT1
PMA4
47
I/O
I
O
TTL
ST
Digital I/O.
External interrupt 1.
Parallel Master Port address.
RB2/INT2/PMA3
RB2
INT2
PMA3
46
I/O
I
O
TTL
ST
Digital I/O.
External interrupt 2.
Parallel Master Port address.
RB3/INT3/PMA2
RB3
INT3
PMA2
45
I/O
I
O
TTL
ST
Digital I/O.
External interrupt 3.
Parallel Master Port address.
RB4/KBI0/PMA1
RB4
KBI0
PMA1
44
I/O
I
I/O
TTL
Digital I/O.
Interrupt-on-change pin.
Parallel Master Port address.
RB5/KBI1/PMA0
RB5
KBI1
PMA0
43
I/O
I
I/O
TTL
Digital I/O.
Interrupt-on-change pin.
Parallel Master Port address.
RB6/KBI2/PGC
RB6
KBI2
PGC
42
I/O
I
I/O
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
37
I/O
I
I/O
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
TABLE 1-3:
PIC18F6XJ5X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
64-TQFP
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1: Default assignment for ECCP2/P2A when CCP2MX Configuration bit is set.
2: Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared.
3: RA7 and RA6 will be disabled if OSC1 and OSC2 are used for the clock function.
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