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2007 Microchip Technology Inc.
Preliminary
DS39761B-page 471
PIC18F2682/2685/4682/4685
Master Mode ............................................................211
Operation .........................................................212
Reception .........................................................217
Repeated Start Condition Timing .....................216
Start Condition .................................................215
Transmission ...................................................217
Transmit Sequence ..........................................212
Multi-Master Communication, Bus Collision
and Arbitration .................................................221
Multi-Master Mode ...................................................221
Operation .................................................................200
Read/Write Bit Information (R/W Bit) ...............200, 201
Registers ..................................................................196
Serial Clock (RC3/SCK/SCL) ...................................201
Slave Mode ..............................................................200
Addressing .......................................................200
Reception .........................................................201
Transmission ...................................................201
Sleep Operation .......................................................221
Stop Condition Timing ..............................................220
ID Locations .............................................................343, 362
INCF .................................................................................384
INCFSZ ............................................................................385
In-Circuit Debugger ..........................................................362
In-Circuit Serial Programming (ICSP) ......................343, 362
Indexed Literal Offset Addressing Mode ..........................410
and Standard PIC18 Instructions .............................410
Indirect Addressing ............................................................89
INFSNZ ............................................................................385
Initialization Conditions for All Registers ......................49–60
Instruction Cycle ................................................................65
Clocking Scheme .......................................................65
Flow/Pipelining ...........................................................65
Instruction Set ..................................................................363
ADDLW ....................................................................369
ADDWF ....................................................................369
ADDWF (Indexed Literal Offset Mode) ....................411
ADDWFC .................................................................370
ANDLW ....................................................................370
ANDWF ....................................................................371
BC ............................................................................371
BCF ..........................................................................372
BN ............................................................................372
BNC .........................................................................373
BNN .........................................................................373
BNOV .......................................................................374
BNZ ..........................................................................374
BOV .........................................................................377
BRA ..........................................................................375
BSF ..........................................................................375
BSF (Indexed Literal Offset Mode) ..........................411
BTFSC .....................................................................376
BTFSS .....................................................................376
BTG ..........................................................................377
BZ ............................................................................378
CALL ........................................................................378
CLRF ........................................................................379
CLRWDT ..................................................................379
COMF ......................................................................380
CPFSEQ ..................................................................380
CPFSGT ..................................................................381
CPFSLT ...................................................................381
DAW .........................................................................382
DCFSNZ ..................................................................383
DECF ....................................................................... 382
DECFSZ .................................................................. 383
Extended Instructions .............................................. 405
and Using MPLAB Tools ................................. 412
Considerations when Enabling ........................ 410
Syntax ............................................................. 405
General Format ....................................................... 365
GOTO ...................................................................... 384
INCF ........................................................................ 384
INCFSZ .................................................................... 385
INFSNZ .................................................................... 385
IORLW ..................................................................... 386
IORWF ..................................................................... 386
LFSR ....................................................................... 387
MOVF ...................................................................... 387
MOVFF .................................................................... 388
MOVLB .................................................................... 388
MOVLW ................................................................... 389
MOVWF ................................................................... 389
MULLW .................................................................... 390
MULWF ................................................................... 390
NEGF ....................................................................... 391
NOP ......................................................................... 391
Opcode Field Descriptions ...................................... 364
POP ......................................................................... 392
PUSH ....................................................................... 392
RCALL ..................................................................... 393
RESET ..................................................................... 393
RETFIE .................................................................... 394
RETLW .................................................................... 394
RETURN .................................................................. 395
RLCF ....................................................................... 395
RLNCF ..................................................................... 396
RRCF ....................................................................... 396
RRNCF .................................................................... 397
SETF ....................................................................... 397
SETF (Indexed Literal Offset Mode) ........................ 411
SLEEP ..................................................................... 398
Standard Instructions ............................................... 363
SUBFWB ................................................................. 398
SUBLW .................................................................... 399
SUBWF .................................................................... 399
SUBWFB ................................................................. 400
SWAPF .................................................................... 400
TBLRD ..................................................................... 401
TBLWT .................................................................... 402
TSTFSZ ................................................................... 403
XORLW ................................................................... 403
XORWF ................................................................... 404
Summary Table ....................................................... 366
INTCON Register
RBIF Bit ................................................................... 132
INTCON Registers ........................................................... 115
Inter-Integrated Circuit. See I
2
C.
Internal Oscillator Block ..................................................... 26
Adjustment ................................................................. 26
Frequency Drift .......................................................... 26
INTIO Modes ............................................................. 26
INTOSC Output Frequency ....................................... 26
OSCTUNE Register ................................................... 26
Internal RC Oscillator
Use with WDT .......................................................... 353
Internet Address .............................................................. 478