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| 型號(hào)： | PIC18F458EPTSQTP |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN |
| 中文描述： | 高性能，28/40-Pin增強(qiáng)型閃存微控制器和CAN |
| 文件頁(yè)數(shù)： | 111/384頁(yè) |
| 文件大?。?/td> | 3119K |
| 代理商： | PIC18F458EPTSQTP |
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2002 Microchip Technology Inc.
Preliminary
DS41159B-page 109
PIC18FXX8
11.1
Timer0 Operation
Timer0 can operate as a timer or as a counter.
Timer mode is selected by clearing the T0CS bit. In
Timer mode, the Timer0 module will increment every
instruction cycle (without prescaler). If the TMR0L reg-
ister is written, the increment is inhibited for the follow-
ing two instruction cycles. The user can work around
this by writing an adjusted value to the TMR0L register.
Counter mode is selected by setting the T0CS bit. In
Counter mode, Timer0 will increment either on every
rising, or falling edge of pin RA4/T0CKI. The increment-
ing edge is determined by the Timer0 Source Edge
Select bit (T0SE). Clearing the T0SE bit selects the ris-
ing edge. Restrictions on the external clock input are
discussed below.
When an external clock input is used for Timer0, it must
meet certain requirements. The requirements ensure
the external clock can be synchronized with the internal
phase clock (T
OSC
). Also, there is a delay in the actual
incrementing of Timer0 after synchronization.
11.2
Prescaler
An 8-bit counter is available as a prescaler for the
Timer0 module. The prescaler is not readable or
writable.
The PSA and T0PS2:T0PS0 bits determine the
prescaler assignment and prescale ratio.
Clearing bit PSA will assign the prescaler to the Timer0
module. When the prescaler is assigned to the Timer0
module, prescale values of 1:2, 1:4, ..., 1:256 are
selectable.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g.
CLRF TMR0, MOVWF
TMR0, BSF TMR0, x
.... etc.) will clear the prescaler
count.
11.2.1
SWITCHING PRESCALER
ASSIGNMENT
The prescaler assignment is fully under software con-
trol (i.e., it can be changed
“
on-the-fly
”
during program
execution).
11.3
Timer0 Interrupt
The TMR0 interrupt is generated when the TMR0 reg-
ister overflows from FFh to 00h in 8-bit mode, or FFFFh
to 0000h in 16-bit mode. This overflow sets the TMR0IF
bit. The interrupt can be masked by clearing the
TMR0IE bit. The TMR0IF bit must be cleared in soft-
ware by the Timer0 module Interrupt Service Routine
before re-enabling this interrupt. The TMR0 interrupt
cannot awaken the processor from SLEEP, since the
timer is shut-off during SLEEP.
11.4
16-bit Mode Timer Reads and
Writes
Timer0 can be set in 16-bit mode by clearing T0CON
T08BIT. Registers TMR0H and TMR0L are used to
access 16-bit timer value.
TMR0H is not the high byte of the timer/counter in
16-bit mode, but is actually a buffered version of the
high byte of Timer0 (refer to Figure 11-1). The high byte
of the Timer0 counter/timer is not directly readable nor
writable. TMR0H is updated with the contents of the
high byte of Timer0 during a read of TMR0L. This pro-
vides the ability to read all 16 bits of Timer0 without
having to verify that the read of the high and low byte
were valid, due to a rollover between successive reads
of the high and low byte.
A write to the high byte of Timer0 must also take place
through the TMR0H buffer register. Timer0 high byte is
updated with the contents of buffered value of TMR0H,
when a write occurs to TMR0L. This allows all 16 bits
of Timer0 to be updated at once.
TABLE 11-1:
REGISTERS ASSOCIATED WITH TIMER0
Note:
Writing to TMR0 when the prescaler is
assigned to Timer0, will clear the prescaler
count but will not change the prescaler
assignment.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
RESETS
TMR0L
TMR0H
INTCON
T0CON
Timer0 Module Low Byte Register
Timer0 Module High Byte Register
GIE/GIEH
PEIE/GIEL
TMR0ON
T08BIT
xxxx xxxx
uuuu uuuu
0000 0000
0000 0000
TMR0IE
T0CS
INT0IE
T0SE
RBIE
PSA
TMR0IF
T0PS2
INT0IF
T0PS1
RBIF
T0PS0
0000 000x
0000 000u
1111 1111
1111 1111
TRISA
Legend:
Note
—
PORTA Data Direction Register
(1)
x
= unknown,
u
= unchanged,
-
= unimplemented locations read as '0'. Shaded cells are not used by Timer0.
1:
Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other Oscillator modes,
they are disabled and read as
‘
0
’
.
--11 1111
--11 1111
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| PIC18F458-I/L | 功能描述:8位微控制器 -MCU 32KB 1536 RAM 34 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F458-I/L | 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU CAN ADC 18F458 |
| PIC18F458-I/P | 功能描述:8位微控制器 -MCU 32KB 1536 RAM 34 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F458-I/P | 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU CAN ADC 18F458 |
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