2002 Microchip Technology Inc.
Preliminary
DS41159B-page 53
PIC18FXX8
CANSTATRO4 OPMODE2
TXB2D7
TXB2D6
TXB2D5
TXB2D4
TXB2D3
TXB2D2
TXB2D1
TXB2D0
TXB2DLC
TXB2EIDL
TXB2EIDH
TXB2SIDL
TXB2SIDH
TXB2CON
OPMODE1
TXB2D76
TXB2D66
TXB2D56
TXB2D46
TXB2D36
TXB2D26
TXB2D16
TXB2D06
TXRTR
EID6
EID14
SID1
SID9
TXABT
OPMODE0
TXB2D75
TXB2D65
TXB2D55
TXB2D45
TXB2D35
TXB2D25
TXB2D15
TXB2D05
—
EID5
EID13
SID0
SID8
TXLARB
—
ICODE2
TXB2D73
TXB2D63
TXB2D53
TXB2D43
TXB2D33
TXB2D23
TXB2D13
TXB2D03
DLC3
EID3
EID11
EXIDE
SID6
TXREQ
ICODE1
TXB2D72
TXB2D62
TXB2D52
TXB2D42
TXB2D32
TXB2D22
TXB2D12
TXB2D02
DLC2
EID2
EID10
—
SID5
—
ICODE0
TXB2D71
TXB2D61
TXB2D51
TXB2D41
TXB2D31
TXB2D21
TXB2D11
TXB2D01
DLC1
EID1
EID9
EID17
SID4
TXPRI1
—
xxx- xxx-
33, 200
35, 206
35, 206
35, 206
35, 206
35, 206
35, 206
35, 206
35, 206
35, 207
35, 206
35, 205
35, 205
35, 205
35, 204
TXB2D77
TXB2D67
TXB2D57
TXB2D47
TXB2D37
TXB2D27
TXB2D17
TXB2D07
—
EID7
EID15
SID2
SID10
—
TXB2D74
TXB2D64
TXB2D54
TXB2D44
TXB2D34
TXB2D24
TXB2D14
TXB2D04
—
EID4
EID12
—
SID7
TXERR
TXB2D70
xxxx xxxx
TXB2D60
xxxx xxxx
TXB2D50
xxxx xxxx
TXB2D40
xxxx xxxx
TXB2D30
xxxx xxxx
TXB2D20
xxxx xxxx
TXB2D10
xxxx xxxx
TXB2D00
xxxx xxxx
DLC0
-x-- xxxx
EID0
xxxx xxxx
EID8
xxxx xxxx
EID16
xxx- x-xx
SID3
xxxx xxxx
TXPRI0
-000 0-00
RXM1EIDL
RXM1EIDH
RXM1SIDL
RXM1SIDH
RXM0EIDL
RXM0EIDH
RXM0SIDL
RXM0SIDH
RXF5EIDL
RXF5EIDH
RXF5SIDL
RXF5SIDH
RXF4EIDL
RXF4EIDH
RXF4SIDL
RXF4SIDH
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID3
EID11
—
SID6
EID3
EID11
—
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
xxxx xxxx
xxxx xxxx
xxx- --xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- --xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
36, 214
36, 214
36, 214
36, 213
36, 214
36, 214
36, 214
36, 213
36, 213
36, 213
36, 212
36, 212
36, 213
36, 213
36, 212
36, 212
RXF3EIDL
RXF3EIDH
RXF3SIDL
RXF3SIDH
RXF2EIDL
RXF2EIDH
RXF2SIDL
RXF2SIDH
RXF1EIDL
RXF1EIDH
RXF1SIDL
RXF1SIDH
RXF0EIDL
RXF0EIDH
RXF0SIDL
RXF0SIDH
Legend:
Note
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID7
EID15
SID2
SID10
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID6
EID14
SID1
SID9
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID5
EID13
SID0
SID8
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID4
EID12
—
SID7
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID3
EID11
EXIDEN
SID6
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID2
EID10
—
SID5
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID1
EID9
EID17
SID4
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
EID0
EID8
EID16
SID3
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx- x-xx
xxxx xxxx
36, 213
36, 213
36, 212
36, 212
36, 213
36, 213
36, 212
36, 212
36, 213
36, 213
36, 212
36, 212
36, 213
36, 213
36, 212
36, 212
TABLE 4-2:
REGISTER FILE SUMMARY (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details on
Page:
x
= unknown,
u
= unchanged, - = unimplemented,
q
= value depends on condition
These registers or register bits are not implemented on the PIC18F248 and PIC18F258 and read as
’
0
’
s.
Bit21 of the TBLPTRU allows access to the device configuration bits.
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator mode only and read
‘
0
’
in all other Oscillator
modes.
1:
2:
3: