[ label ] RRNCF f [,d [,a] Oper" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC18F4585-I/ML
寤犲晢锛� Microchip Technology
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閫i€氭€э細 CAN锛孖²C锛孲PI锛孶ART/USART
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杓稿叆/杓稿嚭鏁�(sh霉)锛� 36
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绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶�?銆�?/td> 1K x 8
RAM 瀹归噺锛� 3.25K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.2 V ~ 5.5 V
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宸ヤ綔婧害锛� -40°C ~ 85°C
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2002 Microchip Technology Inc.
Preliminary
DS30485A-page 245
PIC18FXX39
RRNCF
Rotate Right f (no carry)
Syntax:
[ label ] RRNCF f [,d [,a]
Operands:
0
鈮� f 鈮� 255
d
鈭� [0,1]
a
鈭� [0,1]
Operation:
(f<n>)
鈫� dest<n-1>,
(f<0>)
鈫� dest<7>
Status Affected:
N, Z
Encoding:
0100
00da
ffff
Description:
The contents of register 'f' are
rotated one bit to the right. If 'd' is 0,
the result is placed in W. If 'd' is 1,
the result is placed back in register
'f' (default). If 鈥榓(ch菐n)鈥� is 0, the Access
Bank will be selected, overriding
the BSR value. If 鈥榓(ch菐n)鈥� is 1, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write to
destination
Example 1:
RRNCF
REG, 1, 0
Before Instruction
REG
=
1101 0111
After Instruction
REG
=
1110 1011
Example 2:
RRNCF
REG, 0, 0
Before Instruction
W=
?
REG
=
1101 0111
After Instruction
W=
1110 1011
REG
=
1101 0111
register f
SETF
Set f
Syntax:
[ label ] SETF f [,a]
Operands:
0
鈮� f 鈮� 255
a
鈭� [0,1]
Operation:
FFh
鈫� f
Status Affected:
None
Encoding:
0110
100a
ffff
Description:
The contents of the specified regis-
ter are set to FFh. If 鈥榓(ch菐n)鈥� is 0, the
Access Bank will be selected, over-
riding the BSR value. If 鈥榓(ch菐n)鈥� is 1, then
the bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write
register 'f'
Example:
SETF
REG,1
Before Instruction
REG
=
0x5A
After Instruction
REG
=
0xFF
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