2007 Microchip Technology Inc.
Preliminary
DS70165E-page 167
dsPIC33F
REGISTER 12-2:
TyCON (T3CON, T5CON, T7CON OR T9CON) CONTROL REGISTER
R/W-0
U-0
R/W-0
U-0
TON(1)
—TSIDL(1)
—
bit 15
bit 8
U-0
R/W-0
U-0
R/W-0
U-0
—TGATE(1)
TCKPS<1:0>(1)
—
—TCS(1)
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
TON: Timery On bit(1)
1
= Starts 16-bit Timery
0
= Stops 16-bit Timery
bit 14
Unimplemented: Read as ‘0’
bit 13
TSIDL: Stop in Idle Mode bit(1)
1
= Discontinue module operation when device enters Idle mode
0
= Continue module operation in Idle mode
bit 12-7
Unimplemented: Read as ‘0’
bit 6
TGATE: Timery Gated Time Accumulation Enable bit(1)
When TCS = 1:
This bit is ignored.
When TCS = 0:
1
= Gated time accumulation enabled
0
= Gated time accumulation disabled
bit 5-4
TCKPS<1:0>: Timer3 Input Clock Prescale Select bits(1)
11
= 1:256
10
= 1:64
01
= 1:8
00
= 1:1
bit 3-2
Unimplemented: Read as ‘0’
bit 1
TCS: Timery Clock Source Select bit(1)
1
= External clock from pin TyCK (on the rising edge)
0
= Internal clock (FCY)
bit 0
Unimplemented: Read as ‘0’
Note 1:
When 32-bit operation is enabled (T2CON<3> = 1), these bits have no effect on Timery operation; all timer
functions are set through T2CON.
