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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | PIC18F44K20T-I/MV |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 215/234闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | MCU 16KB FLASH 768B RAM 40UQFN |
| 妯欐簴鍖呰锛� | 3,300 |
| 绯诲垪锛� | PIC® XLP™ 18F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 64MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰╀綅锛孒LVD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 35 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 16KB锛�8K x 16锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 256 x 8 |
| RAM 瀹归噺锛� | 768 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 14x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 40-UFQFN 瑁搁湶鐒婄洡 |
| 鍖呰锛� | 甯跺嵎 (TR) |
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2007 Microchip Technology Inc.
Preliminary
DS70165E-page 79
dsPIC33F
REGISTER 4-1:
NVMCON: FLASH MEMORY CONTROL REGISTER
R/SO-0(1)
R/W-0(1)
U-0
WR
WREN
WRERR
鈥�
bit 15
bit 8
U-0
R/W-0(1)
U-0
R/W-0(1)
鈥�
ERASE
鈥�
鈥擭VMOP<3:0>(2)
bit 7
bit 0
Legend:
SO = Satiable only bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as 鈥�0鈥�
-n = Value at POR
鈥�1鈥� = Bit is set
鈥�0鈥� = Bit is cleared
x = Bit is unknown
bit 15
WR: Write Control bit
1
= Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
cleared by hardware once operation is complete.
0
= Program or erase operation is complete and inactive
bit 14
WREN: Write Enable bit
1
= Enable Flash program/erase operations
0
= Inhibit Flash program/erase operations
bit 13
WRERR: Write Sequence Error Flag bit
1
= An improper program or erase sequence attempt or termination has occurred (bit is set
automatically on any set attempt of the WR bit)
0
= The program or erase operation completed normally
bit 12-7
Unimplemented: Read as 鈥�0鈥�
bit 6
ERASE: Erase/Program Enable bit
1
= Perform the erase operation specified by NVMOP<3:0> on the next WR command
0
= Perform the program operation specified by NVMOP<3:0> on the next WR command
bit 5-4
Unimplemented: Read as 鈥�0鈥�
bit 3-0
NVMOP<3:0>: NVM Operation Select bits(2)
1111
= Memory bulk erase operation (ERASE = 1) or no operation (ERASE = 0)
1110
= Reserved
1101
= Erase General Segment and FGS Configuration register
(ERASE = 1) or no operation (ERASE = 0)
1100
= Erase Secure Segment and FSS Configuration register
(ERASE = 1) or no operation (ERASE = 0)
1011
= Reserved
0011
= Memory word program operation (ERASE = 0) or no operation (ERASE = 1)
0010
= Memory page erase operation (ERASE = 1) or no operation (ERASE = 0)
0001
= Memory row program operation (ERASE = 0) or no operation (ERASE = 1)
0000
= Program or erase a single Configuration register byte
Note 1:
These bits can only be reset on POR.
2:
All other combinations of NVMOP<3:0> are unimplemented.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VI-20X-IX-S | CONVERTER MOD DC/DC 5.2V 75W |
| VI-20V-IX-S | CONVERTER MOD DC/DC 5.8V 75W |
| VI-20R-IX-S | CONVERTER MOD DC/DC 7.5V 75W |
| GRM219F51E224ZA01J | CAP CER 0.22UF 25V Y5V 0805 |
| VE-243-IX-S | CONVERTER MOD DC/DC 24V 75W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC18F44K22-E/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16KB Flash 768B RAM 8b FamilynanoWat XLP RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F44K22-E/MV | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16KB FL 768b RAM8bit familynanoWatt XLP RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F44K22-E/P | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16KB Flash 768B RAM 8b FamilynanoWat XLP RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F44K22-E/PT | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16KB Flash 768B RAM 8b FamilynanoWat XLP RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
| PIC18F44K22-I/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 16KB Flash 768B RAM 8b FamilynanoWat XLP RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT |
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