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參數(shù)資料
| 型號(hào)： | PIC18F448-E/L |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 58/116頁 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 8KX16 W/CAN 44-PLCC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | PIC® 18F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | CAN，I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 33 |
| 程序存儲(chǔ)器容量： | 16KB（8K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大小： | 256 x 8 |
| RAM 容量： | 768 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 包裝： | 管件 |
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PIC18FXX8
DS41159E-page 44
2006 Microchip Technology Inc.
4.9
Data Memory Organization
The data memory is implemented as static RAM. Each
register in the data memory has a 12-bit address,
allowing up to 4096 bytes of data memory. Figure 4-6
shows
the
data
memory
organization
for
the
PIC18FXX8 devices.
The data memory map is divided into as many as
16 banks that contain 256 bytes each. The lower 4 bits
of the Bank Select Register (BSR<3:0>) select which
bank will be accessed. The upper 4 bits for the BSR are
not implemented.
The data memory contains Special Function Registers
(SFRs) and General Purpose Registers (GPRs). The
SFRs are used for control and status of the controller
and peripheral functions, while GPRs are used for data
storage and scratchpad operations in the user’s appli-
cation. The SFRs start at the last location of Bank 15
(FFFh) and grow downwards. GPRs start at the first
location of Bank 0 and grow upwards. Any read of an
unimplemented location will read as ‘0’s.
The entire data memory may be accessed directly or
indirectly. Direct addressing may require the use of the
BSR register. Indirect addressing requires the use of
the File Select Register (FSR). Each FSR holds a
12-bit address value that can be used to access any
location in the data memory map without banking.
The instruction set and architecture allow operations
across all banks. This may be accomplished by indirect
addressing or by the use of the MOVFF instruction. The
MOVFF
instruction is a two-word/two-cycle instruction,
that moves a value from one register to another.
To ensure that commonly used registers (SFRs and
select GPRs) can be accessed in a single cycle,
regardless of the current BSR values, an Access Bank
is implemented. A segment of Bank 0 and a segment of
Bank 15 comprise the Access RAM. Section 4.10
“Access Bank” provides a detailed description of the
Access RAM.
4.9.1
GENERAL PURPOSE
REGISTER FILE
The register file can be accessed either directly or
indirectly. Indirect addressing operates through the File
Select Registers (FSR). The operation of indirect
addressing
is
shown
in
Enhanced MCU devices may have banked memory in
the GPR area. GPRs are not initialized by a Power-on
Reset and are unchanged on all other Resets.
Data RAM is available for use as GPR registers by all
instructions. Bank 15 (F00h to FFFh) contains SFRs.
All other banks of data memory contain GPR registers,
starting with Bank 0.
4.9.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 4-1.
The SFRs can be classified into two sets: those asso-
ciated with the “core” function and those related to the
peripheral functions. Those registers related to the
“core” are described in this section, while those related
to the operation of the peripheral features are
described in the section of that peripheral feature.
The
SFRs
are
typically
distributed
among
the
peripherals whose functions they control.
The unused SFR locations will be unimplemented and
read as ‘0’s. See Table 4-1 for addresses for the SFRs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PIC18F448-I/L | 功能描述:8位微控制器 -MCU 16KB 768 RAM 34 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F448-I/L | 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU CAN ADC 18F448 |
| PIC18F448-I/P | 功能描述:8位微控制器 -MCU 16KB 768 RAM 34 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC18F448-I/P | 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU CAN ADC 18F448 |
| PIC18F448-I/PT | 功能描述:8位微控制器 -MCU 16KB 768 RAM 34 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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