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2001 Microchip Technology Inc.
Advance Information
DS39564A-page 301
PIC18FXX2
INDEX
A
A/D
...................................................................................179
A/D Converter Flag (ADIF Bit)
.................................181
A/D Converter Interrupt, Configuring
.......................182
Acquisition Requirements
........................................182
ADCON0 Register
....................................................179
ADCON1 Register
............................................ 179
,
180
ADRESH Register
....................................................179
ADRESH/ADRESL Registers
..................................181
ADRESL Register
....................................................179
Analog Port Pins
.................................................. 97
,
98
Analog Port Pins, Configuring
..................................184
Associated Registers
...............................................186
Block Diagram
..........................................................181
Block Diagram, Analog Input Model
.........................182
Configuring the Module
............................................182
Conversion Clock (T
AD
)
...........................................184
Conversion Status (GO/DONE Bit)
..........................181
Conversions
.............................................................185
Converter Characteristics
........................................284
Equations
.................................................................183
Minimum Charging Time
..................................183
Examples
Calculating the Minimum Required
Acquisition Time
......................................183
Results Registers
.....................................................185
Special Event Trigger (CCP)
............................ 118
,
186
T
AD
vs. Device Operating Frequencies
....................184
Timing Diagram
........................................................285
Use of the SSP2 Trigger
..........................................186
Absolute Maximum Ratings
.............................................257
AC (Timing) Characteristics
.............................................266
Load Conditions for Device Timing Specifications
...267
Parameter Symbology
.............................................266
Temperature and Voltage Specifications
.................267
Timing Conditions
....................................................267
ADCON0 Register
............................................................179
GO/DONE Bit
...........................................................181
ADCON1 Register
.................................................... 179
,
180
ADDLW
............................................................................215
ADDWF
............................................................................215
ADDWFC
.........................................................................216
ADRESH Register
............................................................179
ADRESH/ADRESL Registers
...........................................181
ADRESL Register
............................................................179
AKS
..................................................................................153
Analog-to-Digital Converter.
See
A/D
ANDLW
............................................................................216
ANDWF
............................................................................217
Assembler
MPASM Assembler
..................................................251
B
Baud Rate Generator
....................................................... 149
BC
.................................................................................... 217
BCF
.................................................................................. 218
BF
.................................................................................... 153
Block Diagrams
A/D Converter
.......................................................... 181
Analog Input Model
.................................................. 182
Baud Rate Generator
.............................................. 149
Capture Mode Operation
......................................... 117
Compare Mode Operation
....................................... 118
Low Voltage Detect
External Reference Source
............................. 188
Internal Reference Source
............................... 188
MSSP
I
2
C Mode
......................................................... 132
MSSP (SPI Mode)
................................................... 123
On-Chip Reset Circuit
................................................ 25
Parallel Slave Port (PORTD and PORTE)
................. 98
PIC18F2X2
.................................................................. 8
PIC18F4X2
.................................................................. 9
PLL
............................................................................ 19
PORTA
RA3:RA0 and RA5 Port Pins
............................. 85
RA4/T0CKI Pin
.................................................. 86
RA6 Pin
............................................................. 86
PORTB
RB2:RB0 Port Pins
............................................ 89
RB3 Pin
............................................................. 89
RB7:RB4 Port Pins
............................................ 88
PORTC (Peripheral Output Override)
........................ 91
PORTD (I/O Mode)
.................................................... 93
PORTE (I/O Mode)
.................................................... 95
PWM Operation (Simplified)
.................................... 120
Timer1
..................................................................... 106
Timer1 (16-bit R/W Mode)
....................................... 106
Timer2
..................................................................... 110
Timer3
..................................................................... 112
Timer3 (16-bit R/W Mode)
....................................... 112
USART
Asynchronous Receive
.................................... 171
Asynchronous Transmit
................................... 169
Watchdog Timer
...................................................... 202
BN
.................................................................................... 218
BNC
................................................................................. 219
BNN
................................................................................. 219
BNOV
............................................................................... 220
BNZ
.................................................................................. 220
BOR.
See
Brown-out Reset.
BOV
................................................................................. 223
BRA
................................................................................. 221
BRG.
See
Baud Rate Generator.
Brown-out Reset (BOR)
..............................................26
,
193
Timing Diagram
....................................................... 271
BSF
.................................................................................. 221
BTFSC
............................................................................. 222
BTFSS
............................................................................. 222
BTG
................................................................................. 223
Bus Collision During a RESTART Condition
................... 160
Bus Collision During a START Condition
........................ 158
Bus Collision During a STOP Condition
.......................... 161
BZ
.................................................................................... 224