2001 Microchip Technology Inc.
DS30292C-page 85
PIC16F87X
FIGURE 9-15:
I2C MASTER MODE TIMING (RECEPTION, 7-BIT ADDRESS)
P
9
8
7
6
5
D0
D1
D2
D3
D4
D5
D6
D7
S
A7
A
6
A5
A4
A3
A2
A1
SD
A
SC
L
12
3
4
5
6
7
8
9
12
3
4
5
67
8
9
123
4
B
u
s
M
a
ster
term
inate
s
tra
n
sfer
AC
K
Re
ce
ivin
g
Da
ta
fr
o
m
S
la
v
e
Re
ce
ivin
g
Da
ta
fr
o
m
Sla
v
e
D0
D1
D2
D3
D4
D5
D6
D7
ACK
R/W
=
1
T
ra
n
smi
tA
ddr
ess
to
S
lave
S
SPI
F
BF
ACK
i
s
not
sent
W
ri
te
t
o
S
P
C
ON
2<
0>
(S
E
N
=
1)
W
ri
te
to
S
P
B
U
F
occu
rs
her
e
A
C
K
f
ro
m
Sl
a
v
e
M
a
ster
confi
g
ured
as
a
r
e
cei
v
er
b
y
pro
g
ram
m
ing
S
P
C
O
N
2<
3>
,(R
C
E
N
=
1)
PE
N
b
it
=
1
w
ri
tte
n
her
e
D
a
ta
shi
fte
d
i
n
on
fal
ling
ed
ge
of
C
L
K
C
lear
ed
i
n
so
ftw
a
re
S
tart
X
M
IT
SEN
=
0
SS
PO
V
SDA
=
0
,SCL
=
1
wh
ile
CP
U
(S
SP
S
T
A
T
<0
>)
AC
K
La
st
bit
is
shif
ted
into
S
P
S
R
and
con
tent
s
ar
e
unl
oa
ded
i
n
to
S
P
B
U
F
Cle
a
re
d
in
so
ft
wa
re
C
lea
re
d
i
n
s
o
ft
w
a
re
S
e
tS
S
P
IF
in
terr
upt
at
end
of
r
e
cei
v
e
Se
tP
b
it
(SSP
ST
A
T
<4
>)
an
d
S
P
IF
Cle
a
re
d
in
so
ftwa
re
A
C
K
fro
m
Ma
ster
Se
tSS
PI
F
a
te
n
d
S
e
tS
S
P
IF
inter
rup
t
at
end
o
fackno
w
le
dge
seq
uence
Se
tSS
PI
F
in
te
rr
u
p
t
at
e
nd
of
A
ckno
w
-
ledge
seque
nce
of
r
e
ceive
S
e
tA
C
K
E
N
to
sta
rt
A
cknow
le
d
ge
seq
uence
S
P
O
V
i
s
set
beca
u
se
S
SPB
UF
is
still
fu
ll
S
D
A
=
ACK
D
T
=
1
RCEN
cle
a
re
d
a
u
toma
tically
RCEN
=
1
st
a
rt
ne
xt
r
e
ce
ive
W
ri
te
to
S
P
C
ON
2<
4>
to
st
ar
tA
cknow
ledge
seque
nce
SD
A
=
ACK
D
T
(
SSP
CO
N2
<5
>)
=
0
RCEN
cle
a
re
d
a
u
tom
a
tically
re
spon
ds
to
S
P
IF
ACK
E
N
Be
g
in
ST
AR
T
Co
n
d
itio
n
Cle
a
re
d
in
so
ft
wa
re
SDA
=
A
C
KDT
=
0