參數(shù)資料
型號: PIC16LF870-I/SS
廠商: Microchip Technology
文件頁數(shù): 98/143頁
文件大?。?/td> 0K
描述: IC MCU FLASH 2KX14 EE A/D 28SSOP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 47
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 639 (CN2011-ZH PDF)
PIC16F870/871
DS30569B-page 56
2003 Microchip Technology Inc.
8.2
Capture Mode
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RC2/CCP1. An event is defined as one of the
following:
Every falling edge
Every rising edge
Every 4th rising edge
Every 16th rising edge
The type of event is configured by control bits
CCP1M3:CCP1M0 (CCP1CON<3:0>). When a cap-
ture is made, the interrupt request flag bit CCP1IF
(PIR1<2>) is set. The interrupt flag must be cleared in
software. If another capture occurs before the value in
register CCPR1 is read, the old captured value is
overwritten by the new value.
8.2.1
CCP PIN CONFIGURATION
In Capture mode, the RC2/CCP1 pin should be
configured as an input by setting the TRISC<2> bit.
FIGURE 8-1:
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
8.2.2
TIMER1 MODE SELECTION
Timer1 must be running in Timer mode, or Synchro-
nized Counter mode, for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
8.2.3
SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit, CCP1IF, following any such
change in Operating mode.
8.2.4
CCP PRESCALER
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. Any RESET will clear
the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 8-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
EXAMPLE 8-1:
CHANGING BETWEEN
CAPTURE PRESCALERS
Note:
If the RC2/CCP1 pin is configured as an
output, a write to the port can cause a
capture condition.
CCPR1H
CCPR1L
TMR1H
TMR1L
Set Flag bit CCP1IF
(PIR1<2>)
Capture
Enable
Qs
CCP1CON<3:0>
RC2/CCP1
Prescaler
÷ 1, 4, 16
and
Edge Detect
pin
CLRF
CCP1CON
; Turn CCP module off
MOVLW
NEW_CAPT_PS
; Load the W reg with
; the new prescaler
; move value and CCP ON
MOVWF
CCP1CON
; Load CCP1CON with this
; value
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