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參數(shù)資料
型號: PIC16LF870-I/SS
廠商: Microchip Technology
文件頁數(shù): 53/143頁
文件大小: 0K
描述: IC MCU FLASH 2KX14 EE A/D 28SSOP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 47
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 639 (CN2011-ZH PDF)
2003 Microchip Technology Inc.
DS30569B-page 15
PIC16F870/871
Bank 2
100h(4)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000
101h
TMR0
Timer0 Module’s Register
xxxx xxxx
uuuu uuuu
102h(4)
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
103h(4)
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
104h(4)
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
uuuu uuuu
105h
Unimplemented
106h
PORTB
PORTB Data Latch when written: PORTB pins when read
xxxx xxxx
uuuu uuuu
107h
Unimplemented
108h
Unimplemented
109h
Unimplemented
10Ah(1,4)
PCLATH
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
10Bh(4)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
10Ch
EEDATA
EEPROM Data Register
xxxx xxxx
uuuu uuuu
10Dh
EEADR
EEPROM Address Register
xxxx xxxx
uuuu uuuu
10Eh
EEDATH
EEPROM Data Register High Byte
xxxx xxxx
uuuu uuuu
10Fh
EEADRH
EEPROM Address Register High Byte
xxxx xxxx
uuuu uuuu
Bank 3
180h(4)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
0000 0000
181h
OPTION_REG
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
182h(4)
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
183h(4)
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
000q quuu
184h(4)
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
uuuu uuuu
185h
Unimplemented
186h
TRISB
PORTB Data Direction Register
1111 1111
187h
Unimplemented
188h
Unimplemented
189h
Unimplemented
18Ah(1,4)
PCLATH
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
18Bh(4)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
18Ch
EECON1
EEPGD
WRERR
WREN
WR
RD
x--- x000
x--- u000
18Dh
EECON2
EEPROM Control Register2 (not a physical register)
---- ----
18Eh
Reserved maintain clear
0000 0000
18Fh
Reserved maintain clear
0000 0000
TABLE 2-1:
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
RESETS(2)
Legend:
x
= unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note
1:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter.
2:
Other (non Power-up) Resets include external RESET through MCLR and Watchdog Timer Reset.
3:
Bits PSPIE and PSPIF are reserved on the 28-pin devices; always maintain these bits clear.
4:
These registers can be addressed from any bank.
5:
PORTD, PORTE, TRISD and TRISE are not physically implemented on the 28-pin devices, read as ‘0’.
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