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  • 參數(shù)資料
    型號: PIC16LF767T-I/ML
    廠商: Microchip Technology
    文件頁數(shù): 19/231頁
    文件大?。?/td> 0K
    描述: IC PIC MCU FLASH 8KX14 28QFN
    產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
    標準包裝: 1,600
    系列: PIC® 16F
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 10MHz
    連通性: I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
    輸入/輸出數(shù): 25
    程序存儲器容量: 14KB(8K x 14)
    程序存儲器類型: 閃存
    RAM 容量: 368 x 8
    電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 11x10b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 28-VQFN 裸露焊盤
    包裝: 帶卷 (TR)
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    2009 Microchip Technology Inc.
    DS39636D-page 121
    PIC18F2X1X/4X1X
    11.2
    Timer1 16-Bit Read/Write Mode
    Timer1 can be configured for 16-bit reads and writes
    (see Figure 11-2). When the RD16 control bit
    (T1CON<7>) is set, the address for TMR1H is mapped
    to a buffer register for the high byte of Timer1. A read
    from TMR1L will load the contents of the high byte of
    Timer1 into the Timer1 high byte buffer. This provides
    the user with the ability to accurately read all 16 bits of
    Timer1 without having to determine whether a read of
    the high byte, followed by a read of the low byte, has
    become invalid due to a rollover between reads.
    A write to the high byte of Timer1 must also take place
    through the TMR1H Buffer register. The Timer1 high
    byte is updated with the contents of TMR1H when a
    write occurs to TMR1L. This allows a user to write all
    16 bits to both the high and low bytes of Timer1 at once.
    The high byte of Timer1 is not directly readable or
    writable in this mode. All reads and writes must take
    place through the Timer1 High Byte Buffer register.
    Writes to TMR1H do not clear the Timer1 prescaler.
    The prescaler is only cleared on writes to TMR1L.
    11.3
    Timer1 Oscillator
    An on-chip crystal oscillator circuit is incorporated
    between pins T1OSI (input) and T1OSO (amplifier
    output). It is enabled by setting the Timer1 Oscillator
    Enable bit, T1OSCEN (T1CON<3>). The oscillator is a
    low-power circuit rated for 32 kHz crystals. It will
    continue to run during all power-managed modes. The
    circuit for a typical LP oscillator is shown in Figure 11-3.
    Table 11-1 shows the capacitor selection for the Timer1
    oscillator.
    The user must provide a software time delay to ensure
    proper start-up of the Timer1 oscillator.
    FIGURE 11-3:
    EXTERNAL
    COMPONENTS FOR THE
    TIMER1 LP OSCILLATOR
    TABLE 11-1:
    CAPACITOR SELECTION FOR
    THE TIMER OSCILLATOR
    11.3.1
    USING TIMER1 AS A
    CLOCK SOURCE
    The Timer1 oscillator is also available as a clock source
    in power-managed modes. By setting the clock select
    bits, SCS1:SCS0 (OSCCON<1:0>), to ‘01’, the device
    switches to SEC_RUN mode; both the CPU and
    peripherals are clocked from the Timer1 oscillator. If the
    IDLEN bit (OSCCON<7>) is cleared and a SLEEP
    instruction is executed, the device enter SEC_IDLE
    mode. Additional details are available in Section 3.0
    Whenever the Timer1 oscillator is providing the clock
    source, the Timer1 system clock status flag, T1RUN
    (T1CON<6>), is set. This can be used to determine the
    controller’s current clocking mode. It can also indicate
    the clock source being currently used by the Fail-Safe
    Clock Monitor. If the Clock Monitor is enabled and the
    Timer1 oscillator fails while providing the clock, polling
    the T1RUN bit will indicate whether the clock is being
    provided by the Timer1 oscillator or another source.
    11.3.2
    LOW-POWER TIMER1 OPTION
    The Timer1 oscillator can operate at two distinct levels
    of power consumption based on device configuration.
    When the LPT1OSC Configuration bit is set, the Timer1
    oscillator operates in a low-power mode. When
    LPT1OSC is not set, Timer1 operates at a higher power
    level. Power consumption for a particular mode is rela-
    tively constant, regardless of the device’s operating
    mode. The default Timer1 configuration is the higher
    power mode.
    As the low-power Timer1 mode tends to be more sen-
    sitive to interference, high noise environments may
    cause some oscillator instability. The low-power option
    is, therefore, best suited for low noise applications
    where power conservation is an important design
    consideration.
    Note:
    See the Notes with Table 11-1 for additional
    information about capacitor selection.
    C1
    C2
    XTAL
    PIC18FXXXX
    T1OSI
    T1OSO
    32.768 kHz
    27 pF
    Osc Type
    Freq
    C1
    C2
    LP
    32 kHz
    27 pF(1)
    Note 1: Microchip suggests these values as a
    starting point in validating the oscillator
    circuit.
    2: Higher capacitance increases the stability
    of the oscillator but also increases the
    start-up time.
    3: Since each resonator/crystal has its own
    characteristics, the user should consult
    the resonator/crystal manufacturer for
    appropriate
    values
    of
    external
    components.
    4: Capacitor values are for design guidance
    only.
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