參數(shù)資料
型號: PIC16LCE623-04E/P
廠商: Microchip Technology
文件頁數(shù): 51/100頁
文件大?。?/td> 0K
描述: IC MCU CMOS.5K OTP W/EEPRM 18DIP
標(biāo)準(zhǔn)包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 896B(512 x 14)
程序存儲器類型: OTP
EEPROM 大?。?/td> 128 x 8
RAM 容量: 96 x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 125°C
封裝/外殼: 18-DIP(0.300",7.62mm)
包裝: 管件
PIC16CE62X
DS40182C-page 44
1999 Microchip Technology Inc.
8.4
Comparator Response Time
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output has a valid level. If the internal refer-
ence is changed, the maximum delay of the internal
voltage reference must be considered when using the
comparator outputs, otherwise the maximum delay of
the comparators should be used (Table 13-1 ).
8.5
Comparator Outputs
The comparator outputs are read through the CMCON
register. These bits are read only. The comparator
outputs may also be directly output to the RA3 and RA4
I/O pins. When the CM<2:0> = 110, multiplexors in the
output path of the RA3 and RA4 pins will switch and the
output of each pin will be the unsynchronized output of
the comparator. The uncertainty of each of the
comparators is related to the input offset voltage and
the
response
time
given
in
the
specifications.
Figure 8-3 shows the comparator output block diagram.
The TRISA bits will still function as an output
enable/disable for the RA3 and RA4 pins while in this
mode.
Note 1: When reading the PORT register, all pins
configured as analog inputs will read as
a ‘0’. Pins configured as digital inputs will
convert an analog input according to the
Schmitt Trigger input specification.
2: Analog levels on any pin that is defined
as a digital input may cause the input
buffer to consume more current than is
specified.
FIGURE 8-3:
COMPARATOR OUTPUT BLOCK DIAGRAM
D
Q
EN
To RA3 or
RA4 Pin
Data
Bus
RD CMCON
Set
MULTIPLEX
CMIF
Bit
-
+
Q
CL
Port Pins
RD CMCON
NRESET
From
Other
Comparator
EN
D
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