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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | PIC16F87T-I/SS |
| 寤犲晢锛� | Microchip Technology |
| 鏂囦欢闋佹暩(sh霉)锛� | 121/200闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU FLASH 4KX14 EEPROM 20SSOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Asynchronous Stimulus |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1,600 |
| 绯诲垪锛� | PIC® 16F |
| 鏍稿績铏曠悊鍣細 | PIC |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 20MHz |
| 閫ｉ€氭€э細 | I²C锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 16 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 7KB锛�4K x 14锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| EEPROM 澶у皬锛� | 256 x 8 |
| RAM 瀹归噺锛� | 368 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 4 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 20-SSOP锛�0.209"锛�5.30mm 瀵級 |
| 鍖呰锛� | 甯跺嵎 (TR) |
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207
8008H鈥揂VR鈥�04/11
ATtiny48/88
Notes:
1. Typical values at 25
掳C.
2. 鈥淢ax鈥� means the highest value where the pin is guaranteed to be read as low.
3. These parameters are not tested in production.
4. 鈥淢in鈥� means the lowest value where the pin is guaranteed to be read as high.
5. Although each I/O port can sink more than the test conditions (10 mA at V
CC = 5V, 5 mA at VCC = 3V, 2 mA at VCC = 1.8V)
under steady state conditions (non-transient), the following must be observed:
The sum of all I
OL, for ports A0, A3, B0 鈥� B7, C7, D5 鈥� D7 should not exceed 100 mA.
The sum of all I
OL, for ports A1 鈥� A2, C0 鈥� C6, D0 鈥� D4 should not exceed 100 mA.
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test condition.
6. The RESET pin must tolerate high voltages when entering and operating in programming modes and, as a consequence,
has a weak drive strength as compared to regular I/O pins. See Figure 23-34, Figure 23-35, Figure 23-36, Figure 23-37, Fig-
7. High Sink I/O pins are PD0, PD1, PD2 and PD3.
8. Although each I/O port can source more than the test conditions (10 mA at VCC = 5V, 5mA at VCC = 3V, 2 mA at VCC = 1.8V)
under steady state conditions (non-transient), the following must be observed:
The sum of all I
OH, for ports A2 鈥� A3, B0 鈥� B7, C6, D0 鈥� D7 should not exceed 100 mA.
The sum of all IOH, for ports A0 鈥� A1, C0 鈥� C5, C7 should not exceed 100 mA.
If II
OH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current
greater than the listed test condition.
9. These are test limits, which account for leakage currents of the test environment. Actual device leakage currents are lower.
10. Values are with external clock using methods described in 鈥淢inimizing Power Consumption鈥� on page 38. Power reduction is
enabled (PRR = 0xFF) and there is no I/O drive.
11. Measured with Brown-Out Detection (BOD) disabled.
ILIL
Input Leakage
Current I/O Pin
VCC = 5.5V, pin low
(absolute value)
< 0.05
1 (9)
A
ILIH
Input Leakage
Current I/O Pin
VCC = 5.5V, pin high
(absolute value)
< 0.05
1 (9)
A
RPU
Pull-up Resistor, I/O Pin
VCC = 5.5V, input low
20
50
k
惟
Pull-up Resistor, Reset Pin
VCC = 5.5V, input low
30
60
k
惟
ICC
Supply Current,
Active Mode (10)
f = 1MHz, VCC = 2V
0.2
0.4
mA
f = 4MHz, VCC = 3V
1.4
2.5
mA
f = 8MHz, VCC = 5V
4.5
8
mA
Supply Current,
Idle Mode
f = 1MHz, VCC = 2V
0.03
0.1
mA
f = 4MHz, VCC = 3V
0.25
0.6
mA
f = 8MHz, VCC = 5V
1
2
mA
Supply Current,
Power-down Mode (11)
WDT enabled, VCC = 3V
4
10
A
WDT disabled, VCC = 3V
< 0.2
2
A
T
A = -40掳C to +85掳C, VCC = 1.8V to 5.5V (unless otherwise noted) (Continued)
Symbol
Parameter
Condition
Min
Typ (1)
Max
Units
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VE-2NT-IY-B1 | CONVERTER MOD DC/DC 6.5V 50W |
| VE-2NH-IY-B1 | CONVERTER MOD DC/DC 52V 50W |
| PIC16F627T-04E/SS | IC MCU FLASH 1KX14 20-SSOP |
| PIC16C771T/SS | IC MCU OTP 4KX14 A/D PWM 20SSOP |
| VI-BNP-CU-F3 | CONVERTER MOD DC/DC 13.8V 200W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| PIC16F882-E/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Enh FLSH 128 RAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F882-E/SO | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Enh FLSH 128 RAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F882-E/SP | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Enh FLSH 128 RAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F882-E/SS | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Enh FLSH 128 RAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| PIC16F882-I/ML | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 3.5KB Enh FLSH 128 RAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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