參數(shù)資料
型號: PIC16F870-I/SO
廠商: Microchip Technology
文件頁數(shù): 72/143頁
文件大小: 0K
描述: IC MCU FLASH 2KX14 EE 28SOIC
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 27
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 3.5KB(2K x 14)
程序存儲器類型: 閃存
EEPROM 大小: 64 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 5x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 639 (CN2011-ZH PDF)
配用: XLT28SO-1-ND - SOCKET TRANSITION 28SOIC 300MIL
I3-DB16F871-ND - BOARD DAUGHTER ICEPIC3
PIC16F870/871
DS30569B-page 32
2003 Microchip Technology Inc.
3.10
FLASH Program Memory Write
Protection
The configuration word contains a bit that write protects
the FLASH program memory, called WRT. This bit can
only
be
accessed
when
programming
the
PIC16F870/871 devices via ICSP. Once write protec-
tion is enabled, only an erase of the entire device will
disable it. When enabled, write protection prevents any
writes to FLASH program memory. Write protection
does not affect program memory reads.
TABLE 3-1:
READ/WRITE STATE OF INTERNAL FLASH PROGRAM MEMORY
TABLE 3-2:
REGISTERS ASSOCIATED WITH DATA EEPROM/PROGRAM FLASH
Configuration Bits
Memory Location
Internal
Read
Internal
Write
ICSP Read
ICSP Write
CP1
CP0
WRT
00
x
All program memory
Yes
No
01
0
Unprotected areas
Yes
No
Yes
No
01
0
Protected areas
Yes
No
01
1
Unprotected areas
Yes
No
01
1
Protected areas
Yes
No
10
0
Unprotected areas
Yes
No
Yes
No
10
0
Protected areas
Yes
No
10
1
Unprotected areas
Yes
No
10
1
Protected areas
Yes
No
11
0
All program memory
Yes
No
Yes
11
1
All program memory
Yes
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
RESETS
0Bh, 8Bh,
10Bh, 18Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
10Dh
EEADR
EEPROM Address Register, Low Byte
xxxx xxxx
uuuu uuuu
10Fh
EEADRH
EEPROM Address, High Byte
xxxx xxxx
uuuu uuuu
10Ch
EEDATA
EEPROM Data Register, Low Byte
xxxx xxxx
uuuu uuuu
10Eh
EEDATH
EEPROM Data Register, High Byte
xxxx xxxx
uuuu uuuu
18Ch
EECON1
EEPGD
WRERR
WREN
WR
RD
x--- x000
x--- u000
18Dh
EECON2 EEPROM Control Register2 (not a physical register)
Legend:
x
= unknown, u = unchanged, r = reserved, - = unimplemented, read as '0'.
Shaded cells are not used during FLASH/EEPROM access.
Note
1:
These bits are reserved; always maintain these bits clear.
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