參數(shù)資料
型號： PIC16F787
廠商： Microchip Technology Inc.
英文描述： Enhanced FLASH 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory(帶ADC轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲器的閃速CMOS微控制器)
中文描述： 增強型閃存8位CMOS微控制器與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲器（帶ADC的轉(zhuǎn)換器和EEPROM的數(shù)據(jù)存儲器的閃速的CMOS微控制器）
文件頁數(shù)： 71/170頁
文件大?。?/td> 4191K
代理商： PIC16F787
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 69
PIC16F62X
12.1
USART Baud Rate Generator
(BRG)
The BRG supports both the Asynchronous and
Synchronous modes of the USART. It is a dedicated
8-bit baud rate generator. The SPBRG register controls
the period of a free running 8-bit timer. In Asynchro-
nous mode bit BRGH (TXSTA<2>) also controls the
baud rate. In Synchronous mode bit BRGH is ignored.
Table 12-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in Master mode (internal clock).
Given the desired baud rate and Fosc, the nearest
integer value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
F
OSC
= 16 MHz
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
EXAMPLE 12-1:
CALCULATING BAUD
RATE ERROR
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
OSC
/(16(X + 1)) equation can reduce the
baud rate error in some cases.
Writing a new value to the SPBRG register, causes the
BRG timer to be RESET (or cleared), this ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
TABLE 12-1:
BAUD RATE FORMULA
TABLE 12-2:
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Desired Baud rate = F
OSC
/ (64(X + 1))
9600 = 16000000 / (64( +1 ))X
X =
25.042
°
Calculated Baud Rate = 16000000 / (64(25 + 1))
= 9615
Error = (Calculated Baud Rate = Desired Baud Rate)
Desired Baud Rate
= (9615 - 9600)/ 9600
= 0.16%
SYNC
BRGH = 0 (Low Speed)
BRGH = 1 (High Speed)
0
1
(Asynchronous) Baud Rate = F
OSC
/(64(X+1))
(Synchronous) Baud Rate = F
OSC
/(4(X+1))
Baud Rate= F
OSC
/(16(X+1))
NA
Legend:
X = value in SPBRG (0 to 255)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Value on all
other
RESETS
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010
0000 -010
18h
RCSTA
SPEN
RX9
SREN
CREN
ADEN
FERR
OERR
RX9D
0000 -00x
0000 -00x
99h
SPBRG
Baud Rate Generator Register
0000 0000
0000 0000
Legend:
x
= unknown,
-
= unimplemented read as '0'.
Shaded cells are not used by the BRG.
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