參數(shù)資料
型號(hào): PIC16F787
廠商: Microchip Technology Inc.
英文描述: Enhanced FLASH 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory(帶ADC轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲(chǔ)器的閃速CMOS微控制器)
中文描述: 增強(qiáng)型閃存8位CMOS微控制器與A / D轉(zhuǎn)換器和EEPROM數(shù)據(jù)存儲(chǔ)器(帶ADC的轉(zhuǎn)換器和EEPROM的數(shù)據(jù)存儲(chǔ)器的閃速的CMOS微控制器)
文件頁數(shù): 58/170頁
文件大?。?/td> 4191K
代理商: PIC16F787
PIC16F62X
DS40300C-page 56
Preliminary
2003 Microchip Technology Inc.
9.5
Comparator Outputs
The comparator outputs are read through the CMCON
register. These bits are read only. The comparator
outputs may also be directly output to the RA3 and RA4
I/O pins. When the CM<2:0> = 110, multiplexors in the
output path of the RA3 and RA4/T0CK1 pins will switch
and the output of each pin will be the unsynchronized
output of the comparator. The uncertainty of each of the
comparators is related to the input offset voltage and
the response time given in the specifications. Figure 9-
3 shows the comparator output block diagram.
The TRISA bits will still function as an output enable/
disable for the RA3 and RA4/T0CK1 pins while in this
mode.
FIGURE 9-3:
COMPARATOR OUTPUT BLOCK DIAGRAM
Note 1:
When reading the PORT register, all pins
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input according to the
Schmitt Trigger input specification.
2:
Analog levels on any pin that is defined as
a digital input may cause the input buffer
to consume more current than is
specified.
D
Q
EN
To RA3 or RA4/T0CK1 pin
Set CMIF bit
D
Q
EN
CL
RESET
From other Comparator
To Data Bus
CMCON<7:6>
CnV
OUT
CnI
NV
Q1
RD CMCON
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