參數(shù)資料
型號: PIC16F77T-I/ML
廠商: Microchip Technology
文件頁數(shù): 40/104頁
文件大?。?/td> 0K
描述: IC MCU FLASH 8KX14 A/D 44QFN
標(biāo)準(zhǔn)包裝: 1,600
系列: PIC® 16F
核心處理器: PIC
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 14KB(8K x 14)
程序存儲器類型: 閃存
RAM 容量: 368 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 帶卷 (TR)
PIC16F7X
DS30325B-page 30
2002 Microchip Technology Inc.
3.3
Reading the FLASH Program
Memory
A program memory location may be read by writing two
bytes of the address to the PMADR and PMADRH reg-
isters and then setting control bit RD (PMCON1<0>).
Once the read control bit is set, the microcontroller will
use the next two instruction cycles to read the data. The
data is available in the PMDATA and PMDATH regis-
ters after the second NOP instruction. Therefore, it can
be read as two bytes in the following instructions. The
PMDATA and PMDATH registers will hold this value
until the next read operation.
3.4
Operation During Code Protect
FLASH program memory has its own code protect
mechanism. External Read and Write operations by
programmers are disabled if this mechanism is
enabled.
The microcontroller can read and execute instructions
out of the internal FLASH program memory, regardless
of the state of the code protect configuration bits.
EXAMPLE 3-1:
FLASH PROGRAM READ
TABLE 3-1:
REGISTERS ASSOCIATED WITH PROGRAM FLASH
BSF
STATUS, RP1
;
BCF
STATUS, RP0
; Bank 2
MOVF
ADDRH, W
;
MOVWF
PMADRH
; MSByte of Program Address to read
MOVF
ADDRL, W
;
MOVWF
PMADR
; LSByte of Program Address to read
BSF
STATUS, RP0
; Bank 3 Required
Required
BSF
PMCON1, RD
; EEPROM Read Sequence
Sequence
NOP
; memory is read in the next two cycles after BSF PMCON1,RD
NOP
;
BCF
STATUS, RP0
; Bank 2
MOVF
PMDATA, W
; W = LSByte of Program PMDATA
MOVF
PMDATH, W
; W = MSByte of Program PMDATA
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
RESETS
10Dh
PMADR
Address Register Low Byte
xxxx xxxx
uuuu uuuu
10Fh
PMADRH
Address Register High Byte
xxxx xxxx
uuuu uuuu
10Ch
PMDATA Data Register Low Byte
xxxx xxxx
uuuu uuuu
10Eh
PMDATH
Data Register High Byte
xxxx xxxx
uuuu uuuu
18Ch
PMCON1
(1)
RD
1--- ---0
Legend:
x
= unknown, u = unchanged, r = reserved, - = unimplemented read as '0'. Shaded cells are not used during FLASH access.
Note
1:
This bit always reads as a ‘1’.
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