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| 型號(hào)： | PIC16F74T-I/ML |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 82/104頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 4KX14 A/D 44QFN |
| 標(biāo)準(zhǔn)包裝： | 1,600 |
| 系列： | PIC® 16F |
| 核心處理器： | PIC |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 33 |
| 程序存儲(chǔ)器容量： | 7KB（4K x 14） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 192 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x8b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-VQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
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Micrel, Inc.
KSZ8851-16MLLJ
March 2010
70
M9999-030210-1.0
Power Management Event Control Register (0xD4 – 0xD5): PMECR (Continued)
Bit
Default Value
R/W
Description
5-2
0x0
RO
(W1C)
Wake-Up Event Indication
These four bits are used to indicate the KSZ8851-16MLLJ wake-up event status as below:
0000: No wake-up event.
0001: Wake-up from energy event detected. (Bit 2 also set to 1 in ISR register)
0010: Wake-up from link up event detected. (Bit 3 also set to 1 in ISR register)
0100: Wake-up from magic packet event detected.
1000: Wake-up from wakeup frame event detected.
If Wake-on-LAN to PME Output Enable bit[11:8] are set, the KSZ8851-16MLLJ also
asserts the PME pin. These bits are cleared on power up reset or by write 1. It is not
modified by either hardware or software reset. When these bits are cleared, the KSZ8851-
16MLLJ deasserts the PME pin.
1-0
0x0
RW
Power Management Mode
These two bits are used to control the KSZ8851-16MLLJ power management mode as
below:
00: Normal Operation Mode.
01: Energy Detect Mode. (two states in this mode either low power or normal power)
10: Soft Power Down Mode.
11: Power Saving Mode.
In energy detect mode under low power state, it can wake-up to normal operation mode
either from line or host wake-up (host CPU issues a read cycle to GRR register).
In soft power down mode, it can wake-up to normal operation mode only from host wake-
up (host CPU issues a read cycle to GRR register).
Go-Sleep & Wake-Up Time Register (0xD6 – 0xD7): GSWUTR
This register contains the value which is used to control minimum Go-Sleep time period when the device from normal
power state to low power state or to control minimum Wake-Up time period when the device from low power state to
normal power state in energy detect mode.
Bit
Default
R/W
Description
15-8
0x08
RW
Wake-up Time
This value is used to control the minimum period that the energy has to be detected
consecutively before the device is waked-up from the low power state. The unit is 16 ms
+/- 80%, the default wake-up time is 128 ms (16ms x 8). Zero time (0x00) is not allowed
7-0
0x0C
RW
Go-sleep Time
This value is used to control the minimum period that the no energy event has to be
detected consecutively before the device enters the low power state when the energy
detect mode is on. The unit is 1 sec +/-80%, the default go-sleep time is 12 sec (1s x 12).
Zero time (0x00) is not allowed
PHY Reset Register (0xD8 – 0xD9): PHYRR
This register contains a control bit to reset PHY block when write an “1”.
Bit
Default
R/W
Description
15-1
-
RW
Reserved.
0
WO
(Self clear)
PHY Reset Bit
This bit is write only and self clear after write an “1”, it is used to reset PHY block circuitry.
0xDA – 0xDF: Reserved
0xE0 – 0xE3: Reserved
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