參數(shù)資料
型號: PIC16C77-10/P
廠商: Microchip Technology
文件頁數(shù): 51/114頁
文件大?。?/td> 0K
描述: IC MCU OTP 8KX14 A/D PWM 40DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 10
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 10MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 33
程序存儲器容量: 14KB(8K x 14)
程序存儲器類型: OTP
RAM 容量: 368 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: 444-1001-ND - DEMO BOARD FOR PICMICRO MCU
1997 Microchip Technology Inc.
DS30390E-page 41
PIC16C7X
Example 4-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the interrupt ser-
vice routine (if interrupts are used).
EXAMPLE 4-1:
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
ORG 0x500
BSF
PCLATH,3
;Select page 1 (800h-FFFh)
BCF
PCLATH,4
;Only on >4K devices
CALL
SUB1_P1
;Call subroutine in
:
;page 1 (800h-FFFh)
:
ORG 0x900
SUB1_P1:
;called subroutine
:
;page 1 (800h-FFFh)
:
RETURN
;return to Call subroutine
;in page 0 (000h-7FFh)
4.5
Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = '0') will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-18.
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-2.
EXAMPLE 4-2:
INDIRECT ADDRESSING
movlw
0x20
;initialize pointer
movwf
FSR
;to RAM
NEXT
clrf
INDF
;clear INDF register
incf
FSR,F
;inc pointer
btfss
FSR,4
;all done?
goto
NEXT
;no clear next
CONTINUE
:
;yes continue
Applicable Devices
72 73 73A 74 74A 76 77
FIGURE 4-18: DIRECT/INDIRECT ADDRESSING
For register le map detail see Figure 4-4, and Figure 4-5.
Data
Memory
Indirect Addressing
Direct Addressing
bank select
location select
RP1:RP0
6
0
from opcode
IRP
FSR register
7
0
bank select
location select
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
not used
FFh
80h
7Fh
00h
17Fh
100h
1FFh
180h
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