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PIC16C505
DS40192D-page 46
1999-2012 Microchip Technology Inc.
IORLW
Inclusive OR literal with W
Syntax:
[
label ]
IORLW k
Operands:
0
k 255
Operation:
(W) .OR. (k)
(W)
Status Affected:
Z
Encoding:
1101
kkkk
Description:
The contents of the W register are
OR’ed with the eight bit literal 'k'.
The result is placed in the W regis-
ter.
Words:
1
Cycles:
1
Example:
IORLW
0x35
Before Instruction
W
=
0x9A
After Instruction
W=
0xBF
Z=
0
IORWF
Inclusive OR W with f
Syntax:
[
label ]
IORWF
f,d
Operands:
0
f 31
d
[0,1]
Operation:
(W).OR. (f)
(dest)
Status Affected:
Z
Encoding:
0001
00df
ffff
Description:
Inclusive OR the W register with
register 'f'. If 'd' is 0, the result is
placed in the W register. If 'd' is 1,
the result is placed back in register
'f'.
Words:
1
Cycles:
1
Example:
IORWF
RESULT, 0
Before Instruction
RESULT =
0x13
W
=
0x91
After Instruction
RESULT =
0x13
W
=
0x93
Z=
0
MOVF
Move f
Syntax:
[
label ]
MOVF f,d
Operands:
0
f 31
d
[0,1]
Operation:
(f)
(dest)
Status Affected:
Z
Encoding:
0010
00df
ffff
Description:
The contents of register 'f' are
moved to destination 'd'. If 'd' is 0,
destination is the W register. If 'd'
is 1, the destination is file register
'f'. 'd' = 1 is useful as a test of a file
register since status flag Z is
affected.
Words:
1
Cycles:
1
Example:
MOVF
FSR,
0
After Instruction
W
=
value in FSR register
MOVLW
Move Literal to W
Syntax:
[
label ]
MOVLW k
Operands:
0
k 255
Operation:
k
(W)
Status Affected:
None
Encoding:
1100
kkkk
Description:
The eight bit literal 'k' is loaded into
the W register. The don’t cares
will assembled as 0s.
Words:
1
Cycles:
1
Example:
MOVLW
0x5A
After Instruction
W
=
0x5A