參數(shù)資料
型號: PIC12F519-I/MS
廠商: Microchip Technology
文件頁數(shù): 47/96頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 1KX12 8MSOP
產品培訓模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標準包裝: 100
系列: PIC® 12F
核心處理器: PIC
芯體尺寸: 8-位
速度: 8MHz
外圍設備: POR,WDT
輸入/輸出數(shù): 5
程序存儲器容量: 1.5KB(1K x 12)
程序存儲器類型: 閃存
RAM 容量: 41 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
包裝: 管件
產品目錄頁面: 637 (CN2011-ZH PDF)
配用: AC162096-ND - HEADER MPLAB ICD2 PIC16F526 8/14
AC164325-ND - MODULE SKT FOR 8MSOP
2008 Microchip Technology Inc.
DS41319B-page 49
PIC12F519
9.0
INSTRUCTION SET SUMMARY
The PIC12F519 instruction set is highly orthogonal and
is comprised of three basic categories.
Byte-oriented operations
Bit-oriented operations
Literal and control operations
Each PIC12F519 instruction is a 12-bit word divided
into an opcode, which specifies the instruction type,
and one or more operands which further specify the
operation of the instruction. The formats for each of the
categories is presented in Figure 9-1, while the various
opcode fields are summarized in Table 9-1.
For byte-oriented instructions, ‘f’ represents a file reg-
ister designator and ‘d’ represents a destination desig-
nator. The file register designator specifies which file
register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator which selects the number of the bit affected
by the operation, while ‘f’ represents the number of the
file in which the bit is located.
For literal and control operations, ‘k’ represents an
8 or 9-bit constant or literal value.
TABLE 9-1:
OPCODE FIELD
DESCRIPTIONS
All instructions are executed within a single instruction
cycle, unless a conditional test is true or the program
counter is changed as a result of an instruction. In this
case, the execution takes two instruction cycles. One
instruction cycle consists of four oscillator periods.
Thus, for an oscillator frequency of 4 MHz, the normal
instruction execution time is 1
μs. If a conditional test is
true or the program counter is changed as a result of an
instruction, the instruction execution time is 2
μs.
Figure 9-1 shows the three general formats that the
instructions can have. All examples in the figure use
the following format to represent a hexadecimal
number:
0xhhh
where ‘h’ signifies a hexadecimal digit.
FIGURE 9-1:
GENERAL FORMAT FOR
INSTRUCTIONS
Field
Description
f
Register file address (0x00 to 0x7F)
W
Working register (accumulator)
b
Bit address within an 8-bit file register
k
Literal field, constant data or label
x
Don’t care location (= 0 or 1)
The assembler will generate code with x = 0. It is
the recommended form of use for compatibility with
all Microchip software tools.
d
Destination select;
d = 0 (store result in W)
d = 1 (store result in file register ‘f’)
Default is d = 1
label
Label name
TOS
Top-of-Stack
PC
Program Counter
WDT
Watchdog Timer counter
TO
Time-out bit
PD
Power-down bit
dest
Destination, either the W register or the specified
register file location
[
]
Options
(
)
Contents
Assigned to
< >
Register bit field
In the set of
italics
User defined term (font is courier)
Byte-oriented file register operations
11
6
5
4
0
d = 0 for destination W
OPCODE
d
f (FILE #)
d = 1 for destination f
f = 5-bit file register address
Bit-oriented file register operations
11
8 7
5 4
0
OPCODE
b (BIT #)
f (FILE #)
b = 3-bit bit address
f = 5-bit file register address
Literal and control operations
(except GOTO)
11
8
7
0
OPCODE
k (literal)
k = 8-bit immediate value
Literal and control operations
– GOTO instruction
11
9
8
0
OPCODE
k (literal)
k = 9-bit immediate value
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