參數(shù)資料
91
AT89/83EB5114
4311C–8051–02/08
Figure 46. Clock Waveforms
This diagram indicates when signals are clocked internally. The time it takes the signals
to propagate to the pins, however, ranges from 25 to 125 ns. This propagation delay is
dependent on variables such as temperature and pin loading. Propagation also varies
from output to output and component. Typically though (TA=25°C fully loaded) RD and
WR propagation delays are approximately 50 ns. The other signals are typically 85 ns.
Propagation delays are incorporated in the AC specifications.
CLOCK
XTAL2
INTERNAL
STATE4
STATE5
STATE6
STATE1
STATE2
STATE3
STATE4
STATE5
SERIAL PORT SHIFT CLOCK
PORT OPERATION
TXD (MODE 0)
RXD SAMPLED
P1, P3, P4 PINS SAMPLED
MOV DEST PORT (P1, P3, P4)
(INCLUDES INT0, INT1, TO, T1)
OLD DATA
NEW DATA
P1P2
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