參數(shù)資料
型號: PI6LC4831AZBIEX
廠商: PERICOM SEMICONDUCTOR CORP
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, QCC56
封裝: 8 X 8 MM, GREEN, MO-137AE, TQFN-56
文件頁數(shù): 9/14頁
文件大?。?/td> 891K
代理商: PI6LC4831AZBIEX
4
www.pericom.com
P-0.1
03/28/11
Alltrademarksarepropertyoftheirrespectiveowners.
PI6LC4831A
Crystal to Differential HCSL/LVCMOS Frequency Synthesizer
Serial Data Interface I2C
The PI6LC4831A is a slave only I2C device that uses standard I2C protocol. Within any Byte, transmit direction is always from MSB
to LSB.
Read/Write Example:
A read or write to the PI6LC4831A always consists of a Start bit, Address Byte, four Data Bytes, and a stop bit. All values are latched
upon the IC receiving the Stop bit.
How to Write (M: abbreviation for Master or Controller; S: abbreviation for slave/clock)
1 bit
8 bits
1 bit
8 bits
1 bit
8 bits
1 bit
(M) Start
bit
(M) Ad-
dress
(S)Ack
(M) Data
Byte 0
(S)Ack
(M) Data
Byte3
(S)Ack
(M) Stop
bit
How to Read (M: abbreviation for Master or Controller; S: abbreviation for slave/clock)
1 bit
8 bits
1 bit
8 bits
1 bit
8 bits
1 bit
(M) Start bit (M) Send
read address (S) Ack
(S) Send
Data Byte 0 (M) Ack
(S) Data
Byte3
(M) Not Ac-
knowledge
(M) Stop bit
Note that after the last Data Byte is sent by the slave, there is no Ack pulse. SData remains high.
START:
A Start bit is defined as a HIGH to LOW transition on SDATA while SCLK is high.
DATA:
Data may change only when SCLK is LOW and must be stable when SCLK is HIGH. See Data Byte
descriptions for detail on the functionality of the bit settings.
ACKNOWLEDGE:
SDATA is driven LOW by the PI6LC4831A before the SCLK rising edge and held LOW until the SCLK
falling edge.
STOP:
A Stop bit is defined as a LOW to HIGH transition on SDATA while SCLK is High.
11-0032
相關PDF資料
PDF描述
PIIPM15P12D007 AC MOTOR CONTROLLER, 60 A
PIM200AZ 1-OUTPUT 8 W DC-DC REG PWR SUPPLY MODULE
PIM200FZ 1-OUTPUT 7.92 W DC-DC REG PWR SUPPLY MODULE
PIM300FZ 2-OUTPUT 7.9 W DC-DC REG PWR SUPPLY MODULE
PIM300F6Z 2-OUTPUT 7.9 W DC-DC REG PWR SUPPLY MODULE
相關代理商/技術參數(shù)
參數(shù)描述
PI6LC4833ZBIE 功能描述:時鐘發(fā)生器及支持產品 Clock Generator for Power PC RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
PI6LC4833ZBIEX 功能描述:時鐘發(fā)生器及支持產品 Clock Generator for Power PC RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
PI6LC4840ZHE 制造商:Pericom Semiconductor Corporation 功能描述:Frequency Synthesizer 32-Pin TQFN EP 制造商:Pericom Semiconductor Corporation 功能描述:IC FREQ SYNTHESIZER 32TQFN
PI6LC4840ZHEX 制造商:Pericom Semiconductor Corporation 功能描述:Frequency Synthesizer 32-Pin TQFN EP T/R 制造商:Pericom Semiconductor Corporation 功能描述:LVDS SWITCH
PI6PCIEB24ZDE 功能描述:時鐘緩沖器 1:4 PCI Express Gen2 Zero Delay Buffer RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel