Philips Semiconductors
Product specification
PowerMOS transistors
FREDFET, Avalanche energy rated
PHP8ND50E, PHB8ND50E, PHW8ND50E
Fig.13. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); parameter V
DS
Fig.14. Typical switching times t
d(on)
, t
r
, t
d(off)
, t
f
= f(R
G
)
Fig.15. Normalised drain-source breakdown voltage
V
(BR)DSS
/V
(BR)DSS 25 C
= f(T
j
)
Fig.16. Source-Drain diode characteristic.
I
F
= f(V
SDS
); parameter T
j
Fig.17. Maximum permissible non-repetitive
avalanche current (I
) versus avalanche time (t
p
);
unclamped inductive load
Fig.18. Maximum permissible repetitive avalanche
current (I
AR
) versus avalanche time (t
p
)
0
50
Qg, Gate charge (nC)
100
150
0
5
10
15
PHP8N50
VGS, Gate-Source voltage (Volts)
ID = 8.5 A
Tj = 25 C
VDD = 400 V
250 V
100 V
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
5
10
15
20
PHP8N50
VSDS, Source-Drain voltage (Volts)
IF, Source-Drain diode current (Amps)
VGS = 0 V
Tj = 25 C
150 C
0
10
20
30
40
50
60
10
100
1000
td(on)
PHP8N50
RG, Gate resistance (Ohms)
Switching times (ns)
VDD = 250 V
Tj = 25 C
RD = 30 Ohms
VGS = 10 V
tf
tr
td(off)
PHP8N50E
0.1
1
10
1E-06
1E-05
1E-04
1E-03
1E-02
Avalanche time, tp (s)
Non-repetitive Avalanche current, IAS (A)
25 C
VDS
ID
tp
Tj prior to avalanche = 125 C
-100
-50
0
50
100
150
0.85
0.9
0.95
1
1.05
1.1
1.15
Tj, Junction temperature (C)
Normalised Drain-source breakdown voltage
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
PHP8N50E
0.01
0.1
1
10
1E-06
1E-05
1E-04
1E-03
1E-02
Avalanche time, tp (s)
Maximum Repetitive Avalanche Current, IAR (A)
125 C
Tj prior to avalanche = 25 C
August 1998
6
Rev 1.100
