參數(shù)資料
型號: PHN210
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: Dual N-channel enhancement mode TrenchMOS transistor
中文描述: 3.4 A, 30 V, 0.1 ohm, 2 CHANNEL, N-CHANNEL, Si, POWER, MOSFET, MS-012AA
封裝: PLASTIC, SO-8
文件頁數(shù): 1/7頁
文件大?。?/td> 109K
代理商: PHN210
Philips Semiconductors
Product specification
Dual N-channel enhancement mode
TrenchMOS
TM
transistor
PHN210
FEATURES
SYMBOL
QUICK REFERENCE DATA
Dual device
Low threshold voltage
Fast switching
Logic level compatible
Surface mount package
V
DS
= 30 V
I
D
= 3.4 A
R
DS(ON)
100 m
(V
GS
= 10 V)
R
DS(ON)
200 m
(V
GS
= 4.5 V)
GENERAL DESCRIPTION
PINNING
SOT96-1
Dual
mode field-effect transistor in a
plastic envelope using ’
trench
technology.
N-channel
enhancement
PIN
DESCRIPTION
1
source 1
2
gate 1
Applications:-
Motor and relay drivers
d.c. to d.c. converters
Logic level translator
3
source 2
4
gate 2
The PHN210 is supplied in the
SOT96-1 (SO8) surface mounting
package.
5,6
drain 2
7,8
drain 1
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
PARAMETER
Repetitive peak drain-source
voltage
Continuous drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current per MOSFET
1
CONDITIONS
T
j
= 25 C to 150C
MIN.
-
MAX.
30
UNIT
V
V
DS
V
DGR
V
GS
I
D
-
-
-
-
-
-
-
-
30
30
±
20
3.4
2.8
2.4
1.9
14
V
V
V
A
A
A
A
A
R
GS
= 20 k
T
a
= 25 C
T
a
= 70 C
T
a
= 25 C
T
a
= 70 C
T
a
= 25 C
I
D
Drain current per MOSFET (both
MOSFETs conducting)
1
Drain current per MOSFET (pulse
peak value)
Total power dissipation (either or
both MOSFETs conducting)
1
Storage & operating temperature
I
DM
P
tot
T
a
= 25 C
T
a
= 70 C
-
-
2
W
W
C
1.3
150
T
stg
, T
j
- 65
d1
g1
s1
d1
d2
g2
d2
s2
1
2
3
4
5
6
7
8
pin 1 index
1
Surface mounted on FR4 board, t
10 sec
February 1999
1
Rev 1.000
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