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參數(shù)資料
| 型號(hào)： | PHB7N60E |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | JFETs |
| 英文描述： | ER 17C 17#16 SKT RECP BOX |
| 中文描述： | 7 A, 600 V, 1.2 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | SOT-404, 3 PIN |
| 文件頁(yè)數(shù)： | 2/10頁(yè) |
| 文件大?。?/td> | 91K |
| 代理商： | PHB7N60E |
Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
PHP7N60E, PHB7N60E, PHW7N60E
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy
CONDITIONS
Unclamped inductive load, I
= 6.5 A;
t
p
= 0.23 ms; T
j
prior to avalanche = 25C;
V
≤
50 V; R
GS
= 50
; V
GS
= 10 V; refer
to fig:17
MIN.
-
MAX.
583
UNIT
mJ
E
AR
Repetitive avalanche energy
2
I
= 7 A; t
= 2.5
μ
s; T
prior to
-
13
mJ
avalanche = 25C; R
GS
= 50
; V
GS
= 10 V;
refer to fig:18
I
AS
, I
AR
Repetitive and non-repetitive
avalanche current
-
7
A
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-mb
Thermal resistance junction
to mounting base
R
th j-a
Thermal resistance junction
to ambient
CONDITIONS
MIN.
-
TYP. MAX. UNIT
-
0.85
K/W
SOT78 package, in free air
SOT429 package, in free air
SOT404 package, pcb mounted, minimum
footprint
-
-
-
60
45
50
-
-
-
K/W
K/W
K/W
2
pulse width and repetition rate limited by T
j
max.
December 1998
2
Rev 1.400
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