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參數(shù)資料
| 型號： | PF48F4000P0ZTQ0 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT00; Number of Contacts:6; Connector Shell Size:10; Connecting Termination:Solder; Circular Shell Style:Wall Mount Receptacle |
| 中文描述： | 16M X 16 FLASH 1.8V PROM, 88 ns, PBGA88 |
| 封裝： | 8 X 11 MM, 1 MM HEIGHT, LEAD FREE, SCSP-88 |
| 文件頁數(shù)： | 49/102頁 |
| 文件大小： | 1609K |
| 代理商： | PF48F4000P0ZTQ0 |
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1-Gbit P30 Family
Datasheet
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
49
9.1.2
Writes
To perform a write operation, both CE# and WE# are asserted while RST# and OE# are deasserted.
During a write operation, address and data are latched on the rising edge of WE# or CE#,
whichever occurs first.
Table 20, “Command Bus Cycles” on page 50
shows the bus cycle
sequence for each of the supported device commands, while
Table 21, “Command Codes and
Definitions” on page 51
describes each command. See
Section 7.0, “AC Characteristics” on
page 33
for signal-timing details.
Note:
Write operations with invalid V
CC
and/or V
PP
voltages can produce spurious results and should not
be attempted.
9.1.3
Output Disable
When OE# is deasserted, device outputs DQ[15:0] are disabled and placed in a high
-
impedance
(High-Z) state, WAIT is also placed in High-Z.
9.1.4
Standby
When CE# is deasserted the device is deselected and placed in standby, substantially reducing
power consumption. In standby, the data outputs are placed in High-Z, independent of the level
placed on OE#. Standby current, I
CCS
, is the average current measured over any 5 ms time interval,
5
μ
s after CE# is deasserted. During standby, average current is measured over the same time
interval 5
μ
s after CE# is deasserted.
When the device is deselected (while CE# is deasserted) during a program or erase operation, it
continues to consume active power until the program or erase operation is completed.
9.1.5
Reset
As with any automated device, it is important to assert RST# when the system is reset. When the
system comes out of reset, the system processor attempts to read from the flash memory if it is the
system boot device. If a CPU reset occurs with no flash memory reset, improper CPU initialization
may occur because the flash memory may be providing status information rather than array data.
Flash memory devices from Intel allow proper CPU initialization following a system reset through
the use of the RST# input. RST# should be controlled by the same low-true reset signal that resets
the system CPU.
After initial power-up or reset, the device defaults to asynchronous Read Array, and the Status
Register is set to 0x80. Asserting RST# de-energizes all internal circuits, and places the output
drivers in High-Z. When RST# is asserted, the device shuts down the operation in progress, a
process which takes a minimum amount of time to complete. When RST# has been deasserted, the
device is reset to asynchronous Read Array state.
Note:
If RST# is asserted during a program or erase operation, the operation is terminated and the
memory contents at the aborted location (for a program) or block (for an erase) are no longer valid,
because the data may have been only partially written or erased.
When returning from a reset (RST# deasserted), a minimum wait is required before the initial read
access outputs valid data. Also, a minimum delay is required after a reset before a write cycle can
be initiated. After this wake
-
up interval passes, normal operation is restored. See
Section 7.0, “AC
Characteristics” on page 33
for details about signal-timing.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PF48F0P0ZTQ0 | Circular Connector; Body Material:Aluminum; Series:PT00; No. of Contacts:6; Connector Shell Size:10; Connecting Termination:Solder; Circular Shell Style:Wall Mount Receptacle; Circular Contact Gender:Socket; Insert Arrangement:10-98 |
| PF48F2P0ZTQ0 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT00; No. of Contacts:10; Connector Shell Size:12; Connecting Termination:Solder; Circular Shell Style:Wall Mount Receptacle |
| PF48F3P0ZTQ0 | Circular Connector; Body Material:Aluminum; Series:PT00; No. of Contacts:10; Connector Shell Size:12; Connecting Termination:Solder; Circular Shell Style:Wall Mount Receptacle; Circular Contact Gender:Pin; Insert Arrangement:12-10 |
| PF48F4P0ZTQ0 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT00; No. of Contacts:10; Connector Shell Size:12; Connecting Termination:Solder; Circular Shell Style:Wall Mount Receptacle |
| PF48F0P0ZT00 | Circular Connector; Body Material:Aluminum; Series:PT00; No. of Contacts:41; Connector Shell Size:20; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Circular Contact Gender:Socket; Insert Arrangement:20-41 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PF48F4000P0ZTQ0A | 功能描述:IC FLASH 256MBIT 100NS 88-SCSP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| PF48F4000P0ZTQE3 | 功能描述:IC FLASH 256MBIT 100NS 88SCSP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Axcell™ 標準包裝:576 系列:- 格式 - 存儲器:閃存 存儲器類型:閃存 - NAND 存儲容量:512M（64M x 8） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 其它名稱:497-5040 |
| PF48F4000P0ZTQED | 制造商:Micron Technology Inc 功能描述:NOR Flash Parallel/Serial 1.8V 256Mbit 16M x 16bit 110ns 64-Pin EZBGA Tray |
| PF48F4000P0ZTQEJ | 功能描述:IC FLASH 256MBIT SCSP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:Axcell™ 標準包裝:2,000 系列:MoBL® 格式 - 存儲器:RAM 存儲器類型:SRAM - 異步 存儲容量:16M（2M x 8，1M x 16） 速度:45ns 接口:并聯(lián) 電源電壓:2.2 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-VFBGA 供應(yīng)商設(shè)備封裝:48-VFBGA（6x8） 包裝:帶卷 (TR) |
| PF48F4400M0Y0B0 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:Numonyx Wireless Flash Memory (W18) with AD Multiplexed IO |
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