參數(shù)資料
型號: PF48F3000P0ZBQ0
廠商: INTEL CORP
元件分類: PROM
英文描述: CAP 0.01UF 63V 10% MET-POLY-BOX RAD5MM 7.5X6.5X2.5MM BULK
中文描述: 8M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝: 8 X 10 MM, 1.20 MM HEIGHT, LEAD FREE, SCSP-88
文件頁數(shù): 72/102頁
文件大?。?/td> 1609K
代理商: PF48F3000P0ZBQ0
1-Gbit P30 Family
April 2005
72
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
13.3
Protection Registers
The device contains 17 Protection Registers (PRs) that can be used to implement system security
measures and/or device identification. Each Protection Register can be individually locked.
The first 128-bit Protection Register is comprised of two 64-bit (8-word) segments. The lower 64-
bit segment is pre-programmed at the Intel factory with a unique 64-bit number. The other 64-bit
segment, as well as the other sixteen 128-bit Protection Registers, are blank. Users can program
these registers as needed. When programmed, users can then lock the Protection Register(s) to
prevent additional bit programming (see
Figure 33, “Protection Register Map” on page 73
).
The user-programmable Protection Registers contain one-time programmable (OTP) bits; when
programmed, register bits cannot be erased. Each Protection Register can be accessed multiple
times to program individual bits, as long as the register remains unlocked.
Each Protection Register has an associated Lock Register bit. When a Lock Register bit is
programmed, the associated Protection Register can only be read; it can no longer be programmed.
Additionally, because the Lock Register bits themselves are OTP, when programmed, Lock
Register bits cannot be erased. Therefore, when a Protection Register is locked, it cannot be
unlocked.
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