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參數(shù)資料
| 型號(hào)： | PF48F2P0ZT00 |
| 廠商： | Intel Corp. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:41; Series:; Body Material:Aluminum; Connector Shell Size:20; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:20-41 |
| 中文描述： | 英特爾StrataFlash嵌入式存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 22/102頁(yè) |
| 文件大?。?/td> | 1609K |
| 代理商： | PF48F2P0ZT00 |
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1-Gbit P30 Family
April 2005
22
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
4.3
SCSP Configurations
WP#
Input
WRITE PROTECT:
Active low input. WP# low enables the lock-down mechanism. Blocks in lock-
down cannot be unlocked with the Unlock command. WP# high overrides the lock-down function
enabling blocks to be erased or programmed using software commands.
VPP
Power/
lnput
Erase and Program Power:
A valid voltage on this pin allows erasing or programming. Memory
contents cannot be altered when V
PP
≤
V
PPLK
. Block erase and program at invalid V
PP
voltages
should not be attempted.
Set V
= V
for in-system program and erase operations. To accommodate resistor or diode drops
from the system supply, the V
level of V
can be as low as V
min. V
must remain above V
PPL
min to perform in-system flash modification. VPP may be 0 V during read operations.
V
can be applied to main blocks for 1000 cycles maximum and to parameter blocks for 2500
cycles.
VPP can be connected to 9 V for a cumulative total not to exceed 80 hours. Extended use of
this pin at 9 V may reduce block cycling capability.
VCC
Power
Device Core Power Supply:
Core (logic) source voltage. Writes to the flash array are inhibited when
V
CC
≤
V
LKO
. Operations at invalid V
CC
voltages should not be attempted.
VCCQ
Power
Output Power Supply:
Output-driver source voltage.
VSS
Power
Ground:
Connect to system ground. Do not float any VSS connection.
RFU
—
Reserved for Future Use:
Reserved by Intel for future device functionality and enhancement. These
should be treated in the same way as a Do Not Use (DU) signal.
DU
—
Do Not Use:
Do not connect to any other signal, or power supply; must be left floating.
NC
—
No Connect:
No internal connection; can be driven or floated.
Table 4.
QUAD+ SCSP Signal Descriptions (Sheet 2 of 2)
Symbol
Type
Name and Function
Table 5.
Stacked Easy BGA Chip Select Logic
Stack Combination
Selected Flash
Die #1
Selected Flash
Die #2
1-die
F1-CE#
-
2-die
F1-CE# + A25 (V
IL
)
F1-CE# + A25 (V
IH
)
Table 6.
QUAD+ SCSP Chip Select Logic
Stack
Combination
Selected Flash
Die #1
Selected Flash
Die #2
Selected Flash
Die #3
Selected Flash
Die #4
1-die
F1-CE#
-
-
-
2-die
F1-CE# + A24 (V
IL
)
F1-CE# + A24 (V
IH
)
-
-
4-die
F1-CE# + A24 (V
IL
)
F1-CE# + A24 (V
IH
)
F2-CE# + A24 (V
IL
)
F2-CE# + A24 (V
IH
)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PF48F2P0ZTQ0 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
| PF48F3000P0ZBQ0 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:Numonyx StrataFlash Embedded Memory |
| PF48F3000P0ZBQ0A | 功能描述:IC FLASH 128MBIT 85NS 88TPBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
| PF48F3000P0ZBQEA | 功能描述:IC FLASH 128MBIT 65NM SCSP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:Axcell™ 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:閃存 - NAND 存儲(chǔ)容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6 |
| PF48F3000P0ZTQ0 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
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