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FALC
56
PEF 2256 H/E
E1 Registers
User’s Manual
Hardware Description
277
DS1.1, 2003-10-23
If access to these registers is done without control of the interrupt ISR1.XMB the
registers should be written twice to avoid an internal data transfer error.
Note: A software reset (CMDR.XRES) resets these registers.
Port Configuration 1 to 4 (Read/Write)
Value after reset: 00
H
RPC(3:0)
Receive multifunction port configuration
The multifunction ports RP(A to D) are bidirectional. After Reset these
ports are configured as inputs. With the selection of the pin function
the In/Output configuration is also achieved. The input function SYPR
may only be selected once, it must not be selected twice or more.
Register PC1 configures port RPA, while PC2
→
port RPB,
PC3
→
port RPC and PC4
→
port RPD.
0000 = SYPR: Synchronous Pulse Receive (Input)
Together with register RC(1:0) SYPR defines the frame begin
on the receive system interface. Because of the offset
programming the SYPR and the RFM pin function cannot be
selected in parallel.
0001 = RFM: Receive Frame Marker (Output)
CMR2.IRSP = 0 and GPC1.SRFM = 0:
The receive frame marker is active high for one 2.048 MHz
period during any bit position of the current frame.
Programming of the bit position is done by using registers
RC(1:0). The internal time slot assigner is disabled. The RFM
offset calculation formula has to be used.
CMR2.IRSP = 0 and GPC1.SRFM = 1:
The receive frame marker is active high for one system period
as programmed by SIC1.SSC during any bit position of the
current frame. Programming of the bit position is done by using
registers RC(1:0). The internal time slot assigner is disabled.
The RFM offset calculation formula has to be used.
7
0
PC1
RPC13
RPC12
RPC11
RPC10
XPC13
XPC12
XPC11
XPC10
(80)
PC2
RPC23
RPC22
RPC21
RPC20
XPC23
XPC22
XPC21
XPC20
(81)
PC3
RPC33
RPC32
RPC31
RPC30
XPC33
XPC32
XPC31
XPC30
(82)
PC4
RPC43
RPC42
RPC41
RPC40
XPC43
XPC42
XPC41
XPC40
(83)