參數(shù)資料
型號(hào): PEB2447
廠商: SIEMENS AG
英文描述: Memory Time Switch Extended Large MTSXL
中文描述: 內(nèi)存定時(shí)開關(guān)擴(kuò)展大型MTSXL
文件頁(yè)數(shù): 29/51頁(yè)
文件大?。?/td> 1052K
代理商: PEB2447
PEB 2447
Operational Description
Semiconductor Group
29
03.97
If the offset of output time slot to input time slot is greater or equal to the internal delay
due to
table 7
the transmission of data is within the same frame (frame delay 0).
If the offset is smaller or even negative the transmission is in the next frame (frame
delay 1).
Frame delay 1 also occurs when the programmed connection overrides the frame end
(TS63 in Mode 0).
If the offset is smaller and overrides the frame end at the same time the frame delay is 2.
Table 7
Time Slots Delay Mode 0
OCS(4:0)
IN
0
16
17
18
19
20
21
0
0 - 15
3
3
3
3
3
3
16 - 31
3
3
3
3
3
3
1
0 - 15
3
3
3
3
3
3
16 - 31
4
3
3
3
3
3
2
0 - 15
4
3
3
3
3
3
16 - 31
4
4
3
3
3
3
3
0 - 15
4
4
3
3
3
3
16 - 31
4
4
4
3
3
3
.
.
Maximum delay 4 time slots
Examples:
Connection
(OCSR=0)
IN1 ts1
IN1 ts1
IN1 ts62 -> OUT31 ts 0
IN1 ts62 -> OUT1 ts 1
-> OUT1 ts 5
-> OUT1 ts 3
(Offset 4ts) :
(Offset 2ts) :
(Offset 2ts) :
(Offset 3ts) :
frame delay 0
frame delay 1
frame delay 1
frame delay 2
Outputs
7
23
3
3
3
3
3
3
3
3
1
2
3
4
5
6
22
3
3
3
3
3
3
3
3
8
24
3
3
3
3
3
3
3
3
9
25
3
3
3
3
3
3
3
3
10
26
3
3
3
3
3
3
3
3
11
27
3
3
3
3
3
3
3
3
12
28
3
3
3
3
3
3
3
3
13
29
3
3
3
3
3
3
3
3
14
30
3
3
3
3
3
3
3
3
15
31
2
3
3
3
3
3
3
3
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